149 lines
3.9 KiB
C
149 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
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/*
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* Qualcomm SM6350 interconnect IDs
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*
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* Copyright (C) 2022 Luca Weiss <luca.weiss@fairphone.com>
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*/
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#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM6350_H
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#define __DT_BINDINGS_INTERCONNECT_QCOM_SM6350_H
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#define MASTER_A1NOC_CFG 0
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#define MASTER_QUP_0 1
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#define MASTER_EMMC 2
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#define MASTER_UFS_MEM 3
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#define A1NOC_SNOC_SLV 4
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#define SLAVE_SERVICE_A1NOC 5
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#define MASTER_A2NOC_CFG 0
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#define MASTER_QDSS_BAM 1
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#define MASTER_QUP_1 2
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#define MASTER_CRYPTO_CORE_0 3
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#define MASTER_IPA 4
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#define MASTER_QDSS_ETR 5
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#define MASTER_SDCC_2 6
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#define MASTER_USB3 7
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#define A2NOC_SNOC_SLV 8
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#define SLAVE_SERVICE_A2NOC 9
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#define MASTER_CAMNOC_HF0_UNCOMP 0
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#define MASTER_CAMNOC_ICP_UNCOMP 1
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#define MASTER_CAMNOC_SF_UNCOMP 2
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#define MASTER_QUP_CORE_0 3
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#define MASTER_QUP_CORE_1 4
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#define MASTER_LLCC 5
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#define SLAVE_CAMNOC_UNCOMP 6
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#define SLAVE_QUP_CORE_0 7
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#define SLAVE_QUP_CORE_1 8
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#define SLAVE_EBI_CH0 9
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#define MASTER_NPU 0
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#define MASTER_NPU_PROC 1
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#define SLAVE_CDSP_GEM_NOC 2
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#define SNOC_CNOC_MAS 0
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#define MASTER_QDSS_DAP 1
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#define SLAVE_A1NOC_CFG 2
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#define SLAVE_A2NOC_CFG 3
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#define SLAVE_AHB2PHY 4
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#define SLAVE_AHB2PHY_2 5
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#define SLAVE_AOSS 6
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#define SLAVE_BOOT_ROM 7
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#define SLAVE_CAMERA_CFG 8
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#define SLAVE_CAMERA_NRT_THROTTLE_CFG 9
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#define SLAVE_CAMERA_RT_THROTTLE_CFG 10
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#define SLAVE_CLK_CTL 11
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#define SLAVE_RBCPR_CX_CFG 12
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#define SLAVE_RBCPR_MX_CFG 13
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#define SLAVE_CRYPTO_0_CFG 14
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#define SLAVE_DCC_CFG 15
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#define SLAVE_CNOC_DDRSS 16
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#define SLAVE_DISPLAY_CFG 17
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#define SLAVE_DISPLAY_THROTTLE_CFG 18
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#define SLAVE_EMMC_CFG 19
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#define SLAVE_GLM 20
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#define SLAVE_GRAPHICS_3D_CFG 21
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#define SLAVE_IMEM_CFG 22
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#define SLAVE_IPA_CFG 23
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#define SLAVE_CNOC_MNOC_CFG 24
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#define SLAVE_CNOC_MSS 25
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#define SLAVE_NPU_CFG 26
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#define SLAVE_PDM 27
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#define SLAVE_PIMEM_CFG 28
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#define SLAVE_PRNG 29
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#define SLAVE_QDSS_CFG 30
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#define SLAVE_QM_CFG 31
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#define SLAVE_QM_MPU_CFG 32
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#define SLAVE_QUP_0 33
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#define SLAVE_QUP_1 34
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#define SLAVE_SDCC_2 35
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#define SLAVE_SECURITY 36
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#define SLAVE_SNOC_CFG 37
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#define SLAVE_TCSR 38
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#define SLAVE_UFS_MEM_CFG 39
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#define SLAVE_USB3 40
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#define SLAVE_VENUS_CFG 41
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#define SLAVE_VENUS_THROTTLE_CFG 42
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#define SLAVE_VSENSE_CTRL_CFG 43
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#define SLAVE_SERVICE_CNOC 44
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#define MASTER_CNOC_DC_NOC 0
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#define SLAVE_GEM_NOC_CFG 1
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#define SLAVE_LLCC_CFG 2
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#define MASTER_AMPSS_M0 0
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#define MASTER_SYS_TCU 1
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#define MASTER_GEM_NOC_CFG 2
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#define MASTER_COMPUTE_NOC 3
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#define MASTER_MNOC_HF_MEM_NOC 4
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#define MASTER_MNOC_SF_MEM_NOC 5
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#define MASTER_SNOC_GC_MEM_NOC 6
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#define MASTER_SNOC_SF_MEM_NOC 7
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#define MASTER_GRAPHICS_3D 8
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#define SLAVE_MCDMA_MS_MPU_CFG 9
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#define SLAVE_MSS_PROC_MS_MPU_CFG 10
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#define SLAVE_GEM_NOC_SNOC 11
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#define SLAVE_LLCC 12
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#define SLAVE_SERVICE_GEM_NOC 13
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#define MASTER_CNOC_MNOC_CFG 0
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#define MASTER_VIDEO_P0 1
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#define MASTER_VIDEO_PROC 2
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#define MASTER_CAMNOC_HF 3
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#define MASTER_CAMNOC_ICP 4
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#define MASTER_CAMNOC_SF 5
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#define MASTER_MDP_PORT0 6
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#define SLAVE_MNOC_HF_MEM_NOC 7
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#define SLAVE_MNOC_SF_MEM_NOC 8
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#define SLAVE_SERVICE_MNOC 9
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#define MASTER_NPU_SYS 0
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#define MASTER_NPU_NOC_CFG 1
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#define SLAVE_NPU_CAL_DP0 2
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#define SLAVE_NPU_CP 3
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#define SLAVE_NPU_INT_DMA_BWMON_CFG 4
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#define SLAVE_NPU_DPM 5
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#define SLAVE_ISENSE_CFG 6
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#define SLAVE_NPU_LLM_CFG 7
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#define SLAVE_NPU_TCM 8
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#define SLAVE_NPU_COMPUTE_NOC 9
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#define SLAVE_SERVICE_NPU_NOC 10
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#define MASTER_SNOC_CFG 0
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#define A1NOC_SNOC_MAS 1
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#define A2NOC_SNOC_MAS 2
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#define MASTER_GEM_NOC_SNOC 3
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#define MASTER_PIMEM 4
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#define MASTER_GIC 5
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#define SLAVE_APPSS 6
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#define SNOC_CNOC_SLV 7
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#define SLAVE_SNOC_GEM_NOC_GC 8
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#define SLAVE_SNOC_GEM_NOC_SF 9
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#define SLAVE_OCIMEM 10
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#define SLAVE_PIMEM 11
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#define SLAVE_SERVICE_SNOC 12
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#define SLAVE_QDSS_STM 13
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#define SLAVE_TCU 14
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#endif
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