464 lines
15 KiB
C
464 lines
15 KiB
C
/*
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* Copyright © 2007-2008 Intel Corporation
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* Jesse Barnes <jesse.barnes@intel.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __DRM_EDID_H__
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#define __DRM_EDID_H__
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#include <linux/types.h>
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enum hdmi_quantization_range;
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struct drm_connector;
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struct drm_device;
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struct drm_display_mode;
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struct drm_edid;
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struct hdmi_avi_infoframe;
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struct hdmi_vendor_infoframe;
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struct i2c_adapter;
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#define EDID_LENGTH 128
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#define DDC_ADDR 0x50
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#define DDC_ADDR2 0x52 /* E-DDC 1.2 - where DisplayID can hide */
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#define CEA_EXT 0x02
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#define VTB_EXT 0x10
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#define DI_EXT 0x40
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#define LS_EXT 0x50
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#define MI_EXT 0x60
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#define DISPLAYID_EXT 0x70
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struct est_timings {
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u8 t1;
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u8 t2;
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u8 mfg_rsvd;
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} __packed;
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/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
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#define EDID_TIMING_ASPECT_SHIFT 6
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#define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT)
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/* need to add 60 */
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#define EDID_TIMING_VFREQ_SHIFT 0
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#define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT)
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struct std_timing {
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u8 hsize; /* need to multiply by 8 then add 248 */
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u8 vfreq_aspect;
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} __packed;
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#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
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#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
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#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3)
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#define DRM_EDID_PT_STEREO (1 << 5)
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#define DRM_EDID_PT_INTERLACED (1 << 7)
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/* If detailed data is pixel timing */
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struct detailed_pixel_timing {
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u8 hactive_lo;
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u8 hblank_lo;
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u8 hactive_hblank_hi;
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u8 vactive_lo;
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u8 vblank_lo;
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u8 vactive_vblank_hi;
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u8 hsync_offset_lo;
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u8 hsync_pulse_width_lo;
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u8 vsync_offset_pulse_width_lo;
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u8 hsync_vsync_offset_pulse_width_hi;
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u8 width_mm_lo;
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u8 height_mm_lo;
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u8 width_height_mm_hi;
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u8 hborder;
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u8 vborder;
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u8 misc;
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} __packed;
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/* If it's not pixel timing, it'll be one of the below */
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struct detailed_data_string {
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u8 str[13];
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} __packed;
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#define DRM_EDID_RANGE_OFFSET_MIN_VFREQ (1 << 0) /* 1.4 */
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#define DRM_EDID_RANGE_OFFSET_MAX_VFREQ (1 << 1) /* 1.4 */
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#define DRM_EDID_RANGE_OFFSET_MIN_HFREQ (1 << 2) /* 1.4 */
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#define DRM_EDID_RANGE_OFFSET_MAX_HFREQ (1 << 3) /* 1.4 */
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#define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00 /* 1.3 */
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#define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01 /* 1.4 */
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#define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02 /* 1.3 */
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#define DRM_EDID_CVT_SUPPORT_FLAG 0x04 /* 1.4 */
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#define DRM_EDID_CVT_FLAGS_STANDARD_BLANKING (1 << 3)
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#define DRM_EDID_CVT_FLAGS_REDUCED_BLANKING (1 << 4)
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struct detailed_data_monitor_range {
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u8 min_vfreq;
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u8 max_vfreq;
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u8 min_hfreq_khz;
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u8 max_hfreq_khz;
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u8 pixel_clock_mhz; /* need to multiply by 10 */
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u8 flags;
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union {
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struct {
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u8 reserved;
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u8 hfreq_start_khz; /* need to multiply by 2 */
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u8 c; /* need to divide by 2 */
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__le16 m;
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u8 k;
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u8 j; /* need to divide by 2 */
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} __packed gtf2;
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struct {
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u8 version;
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u8 data1; /* high 6 bits: extra clock resolution */
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u8 data2; /* plus low 2 of above: max hactive */
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u8 supported_aspects;
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u8 flags; /* preferred aspect and blanking support */
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u8 supported_scalings;
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u8 preferred_refresh;
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} __packed cvt;
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} __packed formula;
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} __packed;
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struct detailed_data_wpindex {
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u8 white_yx_lo; /* Lower 2 bits each */
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u8 white_x_hi;
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u8 white_y_hi;
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u8 gamma; /* need to divide by 100 then add 1 */
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} __packed;
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struct detailed_data_color_point {
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u8 windex1;
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u8 wpindex1[3];
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u8 windex2;
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u8 wpindex2[3];
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} __packed;
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struct cvt_timing {
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u8 code[3];
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} __packed;
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struct detailed_non_pixel {
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u8 pad1;
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u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
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fb=color point data, fa=standard timing data,
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f9=undefined, f8=mfg. reserved */
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u8 pad2;
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union {
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struct detailed_data_string str;
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struct detailed_data_monitor_range range;
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struct detailed_data_wpindex color;
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struct std_timing timings[6];
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struct cvt_timing cvt[4];
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} __packed data;
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} __packed;
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#define EDID_DETAIL_EST_TIMINGS 0xf7
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#define EDID_DETAIL_CVT_3BYTE 0xf8
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#define EDID_DETAIL_COLOR_MGMT_DATA 0xf9
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#define EDID_DETAIL_STD_MODES 0xfa
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#define EDID_DETAIL_MONITOR_CPDATA 0xfb
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#define EDID_DETAIL_MONITOR_NAME 0xfc
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#define EDID_DETAIL_MONITOR_RANGE 0xfd
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#define EDID_DETAIL_MONITOR_STRING 0xfe
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#define EDID_DETAIL_MONITOR_SERIAL 0xff
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struct detailed_timing {
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__le16 pixel_clock; /* need to multiply by 10 KHz */
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union {
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struct detailed_pixel_timing pixel_data;
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struct detailed_non_pixel other_data;
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} __packed data;
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} __packed;
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#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
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#define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1)
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#define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2)
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#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3)
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#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4)
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#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5)
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#define DRM_EDID_INPUT_DIGITAL (1 << 7)
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#define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_MASK (7 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_UNDEF (0 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_DVI (1 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_HDMI_A (2 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_HDMI_B (3 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_MDDI (4 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_TYPE_DP (5 << 0) /* 1.4 */
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#define DRM_EDID_DIGITAL_DFP_1_X (1 << 0) /* 1.3 */
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#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) /* 1.2 */
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#define DRM_EDID_FEATURE_CONTINUOUS_FREQ (1 << 0) /* 1.4 */
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#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
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#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2)
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/* If analog */
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#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
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/* If digital */
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#define DRM_EDID_FEATURE_COLOR_MASK (3 << 3)
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#define DRM_EDID_FEATURE_RGB (0 << 3)
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#define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3)
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#define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3)
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#define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */
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#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5)
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#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6)
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#define DRM_EDID_FEATURE_PM_STANDBY (1 << 7)
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#define DRM_EDID_HDMI_DC_48 (1 << 6)
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#define DRM_EDID_HDMI_DC_36 (1 << 5)
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#define DRM_EDID_HDMI_DC_30 (1 << 4)
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#define DRM_EDID_HDMI_DC_Y444 (1 << 3)
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/* YCBCR 420 deep color modes */
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#define DRM_EDID_YCBCR420_DC_48 (1 << 2)
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#define DRM_EDID_YCBCR420_DC_36 (1 << 1)
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#define DRM_EDID_YCBCR420_DC_30 (1 << 0)
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#define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \
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DRM_EDID_YCBCR420_DC_36 | \
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DRM_EDID_YCBCR420_DC_30)
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/* HDMI 2.1 additional fields */
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#define DRM_EDID_MAX_FRL_RATE_MASK 0xf0
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#define DRM_EDID_FAPA_START_LOCATION (1 << 0)
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#define DRM_EDID_ALLM (1 << 1)
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#define DRM_EDID_FVA (1 << 2)
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/* Deep Color specific */
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#define DRM_EDID_DC_30BIT_420 (1 << 0)
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#define DRM_EDID_DC_36BIT_420 (1 << 1)
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#define DRM_EDID_DC_48BIT_420 (1 << 2)
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/* VRR specific */
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#define DRM_EDID_CNMVRR (1 << 3)
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#define DRM_EDID_CINEMA_VRR (1 << 4)
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#define DRM_EDID_MDELTA (1 << 5)
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#define DRM_EDID_VRR_MAX_UPPER_MASK 0xc0
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#define DRM_EDID_VRR_MAX_LOWER_MASK 0xff
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#define DRM_EDID_VRR_MIN_MASK 0x3f
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/* DSC specific */
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#define DRM_EDID_DSC_10BPC (1 << 0)
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#define DRM_EDID_DSC_12BPC (1 << 1)
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#define DRM_EDID_DSC_16BPC (1 << 2)
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#define DRM_EDID_DSC_ALL_BPP (1 << 3)
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#define DRM_EDID_DSC_NATIVE_420 (1 << 6)
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#define DRM_EDID_DSC_1P2 (1 << 7)
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#define DRM_EDID_DSC_MAX_FRL_RATE_MASK 0xf0
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#define DRM_EDID_DSC_MAX_SLICES 0xf
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#define DRM_EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f
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struct edid {
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u8 header[8];
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/* Vendor & product info */
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u8 mfg_id[2];
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u8 prod_code[2];
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u32 serial; /* FIXME: byte order */
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u8 mfg_week;
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u8 mfg_year;
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/* EDID version */
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u8 version;
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u8 revision;
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/* Display info: */
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u8 input;
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u8 width_cm;
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u8 height_cm;
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u8 gamma;
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u8 features;
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/* Color characteristics */
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u8 red_green_lo;
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u8 blue_white_lo;
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u8 red_x;
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u8 red_y;
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u8 green_x;
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u8 green_y;
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u8 blue_x;
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u8 blue_y;
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u8 white_x;
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u8 white_y;
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/* Est. timings and mfg rsvd timings*/
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struct est_timings established_timings;
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/* Standard timings 1-8*/
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struct std_timing standard_timings[8];
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/* Detailing timings 1-4 */
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struct detailed_timing detailed_timings[4];
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/* Number of 128 byte ext. blocks */
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u8 extensions;
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/* Checksum */
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u8 checksum;
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} __packed;
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#define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
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/* Short Audio Descriptor */
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struct cea_sad {
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u8 format;
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u8 channels; /* max number of channels - 1 */
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u8 freq;
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u8 byte2; /* meaning depends on format */
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};
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int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads);
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int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb);
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int drm_av_sync_delay(struct drm_connector *connector,
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const struct drm_display_mode *mode);
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bool drm_edid_are_equal(const struct edid *edid1, const struct edid *edid2);
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int
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drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
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const struct drm_connector *connector,
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const struct drm_display_mode *mode);
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int
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drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
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const struct drm_connector *connector,
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const struct drm_display_mode *mode);
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void
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drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
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const struct drm_connector *connector,
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const struct drm_display_mode *mode,
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enum hdmi_quantization_range rgb_quant_range);
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/**
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* drm_edid_decode_mfg_id - Decode the manufacturer ID
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* @mfg_id: The manufacturer ID
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* @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0'
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* termination
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*/
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static inline const char *drm_edid_decode_mfg_id(u16 mfg_id, char vend[4])
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{
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vend[0] = '@' + ((mfg_id >> 10) & 0x1f);
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vend[1] = '@' + ((mfg_id >> 5) & 0x1f);
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vend[2] = '@' + ((mfg_id >> 0) & 0x1f);
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vend[3] = '\0';
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return vend;
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}
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/**
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* drm_edid_encode_panel_id - Encode an ID for matching against drm_edid_get_panel_id()
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* @vend_chr_0: First character of the vendor string.
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* @vend_chr_1: Second character of the vendor string.
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* @vend_chr_2: Third character of the vendor string.
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* @product_id: The 16-bit product ID.
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*
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* This is a macro so that it can be calculated at compile time and used
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* as an initializer.
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*
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* For instance:
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* drm_edid_encode_panel_id('B', 'O', 'E', 0x2d08) => 0x09e52d08
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*
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* Return: a 32-bit ID per panel.
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*/
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#define drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, product_id) \
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((((u32)(vend_chr_0) - '@') & 0x1f) << 26 | \
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(((u32)(vend_chr_1) - '@') & 0x1f) << 21 | \
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(((u32)(vend_chr_2) - '@') & 0x1f) << 16 | \
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((product_id) & 0xffff))
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/**
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* drm_edid_decode_panel_id - Decode a panel ID from drm_edid_encode_panel_id()
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* @panel_id: The panel ID to decode.
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* @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0'
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* termination
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* @product_id: The product ID will be returned here.
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*
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* For instance, after:
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* drm_edid_decode_panel_id(0x09e52d08, vend, &product_id)
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* These will be true:
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* vend[0] = 'B'
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* vend[1] = 'O'
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* vend[2] = 'E'
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* vend[3] = '\0'
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* product_id = 0x2d08
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*/
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static inline void drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id)
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{
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*product_id = (u16)(panel_id & 0xffff);
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drm_edid_decode_mfg_id(panel_id >> 16, vend);
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}
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bool drm_probe_ddc(struct i2c_adapter *adapter);
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struct edid *drm_do_get_edid(struct drm_connector *connector,
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int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
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size_t len),
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void *data);
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struct edid *drm_get_edid(struct drm_connector *connector,
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struct i2c_adapter *adapter);
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u32 drm_edid_get_panel_id(struct i2c_adapter *adapter);
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struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
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struct i2c_adapter *adapter);
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struct edid *drm_edid_duplicate(const struct edid *edid);
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int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid);
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int drm_edid_override_connector_update(struct drm_connector *connector);
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u8 drm_match_cea_mode(const struct drm_display_mode *to_match);
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bool drm_detect_hdmi_monitor(const struct edid *edid);
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bool drm_detect_monitor_audio(const struct edid *edid);
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enum hdmi_quantization_range
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drm_default_rgb_quant_range(const struct drm_display_mode *mode);
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int drm_add_modes_noedid(struct drm_connector *connector,
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int hdisplay, int vdisplay);
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int drm_edid_header_is_valid(const void *edid);
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bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
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bool *edid_corrupt);
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bool drm_edid_is_valid(struct edid *edid);
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void drm_edid_get_monitor_name(const struct edid *edid, char *name,
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int buflen);
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struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
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int hsize, int vsize, int fresh,
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bool rb);
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struct drm_display_mode *
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drm_display_mode_from_cea_vic(struct drm_device *dev,
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u8 video_code);
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/* Interface based on struct drm_edid */
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const struct drm_edid *drm_edid_alloc(const void *edid, size_t size);
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const struct drm_edid *drm_edid_dup(const struct drm_edid *drm_edid);
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void drm_edid_free(const struct drm_edid *drm_edid);
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bool drm_edid_valid(const struct drm_edid *drm_edid);
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const struct edid *drm_edid_raw(const struct drm_edid *drm_edid);
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const struct drm_edid *drm_edid_read(struct drm_connector *connector);
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const struct drm_edid *drm_edid_read_ddc(struct drm_connector *connector,
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struct i2c_adapter *adapter);
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const struct drm_edid *drm_edid_read_custom(struct drm_connector *connector,
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int (*read_block)(void *context, u8 *buf, unsigned int block, size_t len),
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void *context);
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const struct drm_edid *drm_edid_read_switcheroo(struct drm_connector *connector,
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struct i2c_adapter *adapter);
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int drm_edid_connector_update(struct drm_connector *connector,
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const struct drm_edid *edid);
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int drm_edid_connector_add_modes(struct drm_connector *connector);
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bool drm_edid_is_digital(const struct drm_edid *drm_edid);
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const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid,
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int ext_id, int *ext_index);
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#endif /* __DRM_EDID_H__ */
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