kernel-aes67/arch/powerpc
Olof Johansson f66bce5e6a [POWERPC] Add 1TB workaround for PA6T
PA6T has a bug where the slbie instruction does not honor the large
segment bit.  As a result, we have to always use slbia when switching
context.

We don't have to worry about changing the slbie's during fault processing,
since they should never be replacing one VSID with another using the
same ESID.  I.e. there's no risk for inserting duplicate entries due to a
failed slbie of the old entry.  So as long as we clear it out on context
switch we should be fine.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-17 22:30:09 +10:00
..
boot
configs [POWERPC] Enable NO_HZ and high res timers for pseries and ppc64 configs 2007-10-17 22:30:09 +10:00
kernel [POWERPC] Add 1TB workaround for PA6T 2007-10-17 22:30:09 +10:00
lib
math-emu
mm [POWERPC] Add 1TB workaround for PA6T 2007-10-17 22:30:09 +10:00
oprofile
platforms
sysdev
xmon
.gitignore
Kconfig
Kconfig.debug
Makefile