531b617c71
This patch moves items of the s3c24xx support into a new plat-s3c directory for items that use the s3c24xx support but are not directly s3c24xx compatible, such as the s3c2400 and s3c6400. git mv commands: git mv include/asm-arm/arch-s3c2410/iic.h include/asm-arm/plat-s3c/iic.h git mv include/asm-arm/arch-s3c2410/nand.h include/asm-arm/plat-s3c/nand.h git mv include/asm-arm/arch-s3c2410/regs-iic.h include/asm-arm/plat-s3c/regs-iic.h git mv include/asm-arm/arch-s3c2410/regs-nand.h include/asm-arm/plat-s3c/regs-nand.h git mv include/asm-arm/arch-s3c2410/regs-rtc.h include/asm-arm/plat-s3c/regs-rtc.h git mv include/asm-arm/arch-s3c2410/regs-serial.h include/asm-arm/plat-s3c/regs-serial.h git mv include/asm-arm/arch-s3c2410/regs-timer.h include/asm-arm/plat-s3c/regs-timer.h git mv include/asm-arm/arch-s3c2410/regs-watchdog.h include/asm-arm/plat-s3c/regs-watchdog.h Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
57 lines
1.8 KiB
C
57 lines
1.8 KiB
C
/* linux/include/asm-arm/arch-s3c2410/regs-iic.h
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*
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* Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
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* http://www.simtec.co.uk/products/SWLINUX/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* S3C2410 I2C Controller
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*/
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#ifndef __ASM_ARCH_REGS_IIC_H
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#define __ASM_ARCH_REGS_IIC_H __FILE__
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/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */
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#define S3C2410_IICREG(x) (x)
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#define S3C2410_IICCON S3C2410_IICREG(0x00)
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#define S3C2410_IICSTAT S3C2410_IICREG(0x04)
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#define S3C2410_IICADD S3C2410_IICREG(0x08)
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#define S3C2410_IICDS S3C2410_IICREG(0x0C)
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#define S3C2440_IICLC S3C2410_IICREG(0x10)
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#define S3C2410_IICCON_ACKEN (1<<7)
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#define S3C2410_IICCON_TXDIV_16 (0<<6)
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#define S3C2410_IICCON_TXDIV_512 (1<<6)
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#define S3C2410_IICCON_IRQEN (1<<5)
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#define S3C2410_IICCON_IRQPEND (1<<4)
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#define S3C2410_IICCON_SCALE(x) ((x)&15)
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#define S3C2410_IICCON_SCALEMASK (0xf)
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#define S3C2410_IICSTAT_MASTER_RX (2<<6)
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#define S3C2410_IICSTAT_MASTER_TX (3<<6)
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#define S3C2410_IICSTAT_SLAVE_RX (0<<6)
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#define S3C2410_IICSTAT_SLAVE_TX (1<<6)
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#define S3C2410_IICSTAT_MODEMASK (3<<6)
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#define S3C2410_IICSTAT_START (1<<5)
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#define S3C2410_IICSTAT_BUSBUSY (1<<5)
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#define S3C2410_IICSTAT_TXRXEN (1<<4)
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#define S3C2410_IICSTAT_ARBITR (1<<3)
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#define S3C2410_IICSTAT_ASSLAVE (1<<2)
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#define S3C2410_IICSTAT_ADDR0 (1<<1)
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#define S3C2410_IICSTAT_LASTBIT (1<<0)
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#define S3C2410_IICLC_SDA_DELAY0 (0 << 0)
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#define S3C2410_IICLC_SDA_DELAY5 (1 << 0)
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#define S3C2410_IICLC_SDA_DELAY10 (2 << 0)
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#define S3C2410_IICLC_SDA_DELAY15 (3 << 0)
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#define S3C2410_IICLC_SDA_DELAY_MASK (3 << 0)
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#define S3C2410_IICLC_FILTER_ON (1<<2)
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#endif /* __ASM_ARCH_REGS_IIC_H */
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