9d0412680e
Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
63 lines
3.0 KiB
C
63 lines
3.0 KiB
C
/*
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* include/asm-arm/arch-at91/at91sam9261_matrix.h
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*
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* Memory Controllers (MATRIX, EBI) - System peripherals registers.
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* Based on AT91SAM9261 datasheet revision D.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91SAM9261_MATRIX_H
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#define AT91SAM9261_MATRIX_H
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#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */
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#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
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#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
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#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */
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#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */
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#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */
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#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */
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#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */
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#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
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#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
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#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
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#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
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#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
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#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
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#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */
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#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
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#define AT91_MATRIX_ITCM_0 (0 << 0)
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#define AT91_MATRIX_ITCM_16 (5 << 0)
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#define AT91_MATRIX_ITCM_32 (6 << 0)
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#define AT91_MATRIX_ITCM_64 (7 << 0)
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#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
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#define AT91_MATRIX_DTCM_0 (0 << 4)
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#define AT91_MATRIX_DTCM_16 (5 << 4)
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#define AT91_MATRIX_DTCM_32 (6 << 4)
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#define AT91_MATRIX_DTCM_64 (7 << 4)
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#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */
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#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
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#define AT91_MATRIX_CS1A_SMC (0 << 1)
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#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
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#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
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#define AT91_MATRIX_CS3A_SMC (0 << 3)
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#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
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#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
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#define AT91_MATRIX_CS4A_SMC (0 << 4)
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#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
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#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
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#define AT91_MATRIX_CS5A_SMC (0 << 5)
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#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
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#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
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#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */
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#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */
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#endif
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