884d04cd8d
This adds support for PCI Express port on Celleb. I/O space of this PCI Express port is not mapped in memory space. So we use the io-workaround mechanism to make accesses indirect. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
47 lines
1.3 KiB
Makefile
47 lines
1.3 KiB
Makefile
obj-$(CONFIG_PPC_CELL_NATIVE) += interrupt.o iommu.o setup.o \
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cbe_regs.o spider-pic.o \
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pervasive.o pmu.o io-workarounds.o \
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spider-pci.o
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obj-$(CONFIG_CBE_RAS) += ras.o
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obj-$(CONFIG_CBE_THERM) += cbe_thermal.o
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obj-$(CONFIG_CBE_CPUFREQ_PMI) += cbe_cpufreq_pmi.o
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obj-$(CONFIG_CBE_CPUFREQ) += cbe-cpufreq.o
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cbe-cpufreq-y += cbe_cpufreq_pervasive.o cbe_cpufreq.o
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ifeq ($(CONFIG_SMP),y)
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obj-$(CONFIG_PPC_CELL_NATIVE) += smp.o
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endif
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# needed only when building loadable spufs.ko
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spu-priv1-$(CONFIG_PPC_CELL_NATIVE) += spu_priv1_mmio.o
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spu-manage-$(CONFIG_PPC_CELLEB) += spu_manage.o
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spu-manage-$(CONFIG_PPC_CELL_NATIVE) += spu_manage.o
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obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
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spu_notify.o \
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spu_syscalls.o spu_fault.o \
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$(spu-priv1-y) \
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$(spu-manage-y) \
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spufs/
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obj-$(CONFIG_PCI_MSI) += axon_msi.o
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# celleb stuff
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ifeq ($(CONFIG_PPC_CELLEB),y)
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obj-y += celleb_setup.o \
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celleb_pci.o celleb_scc_epci.o \
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celleb_scc_pciex.o \
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celleb_scc_uhc.o \
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io-workarounds.o spider-pci.o \
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beat.o beat_htab.o beat_hvCall.o \
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beat_interrupt.o beat_iommu.o
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obj-$(CONFIG_SMP) += beat_smp.o
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obj-$(CONFIG_PPC_UDBG_BEAT) += beat_udbg.o
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obj-$(CONFIG_SERIAL_TXX9) += celleb_scc_sio.o
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obj-$(CONFIG_SPU_BASE) += beat_spu_priv1.o
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endif
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