173d668138
The Xtensa port contained many header files that were never needed. This rather lengthy patch removes all those files. Unfortunately, there were many dependencies that needed to be updated, so this patch touches quite a few source files. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
225 lines
5.6 KiB
ArmAsm
225 lines
5.6 KiB
ArmAsm
/*
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* arch/xtensa/lib/strncpy_user.S
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*
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* Returns: -EFAULT if exception before terminator, N if the entire
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* buffer filled, else strlen.
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*
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* Copyright (C) 2002 Tensilica Inc.
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*/
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#include <asm/variant/core.h>
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#include <linux/errno.h>
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/* Load or store instructions that may cause exceptions use the EX macro. */
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#define EX(insn,reg1,reg2,offset,handler) \
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9: insn reg1, reg2, offset; \
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.section __ex_table, "a"; \
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.word 9b, handler; \
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.previous
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/*
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* char *__strncpy_user(char *dst, const char *src, size_t len)
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*/
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.text
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.begin literal
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.align 4
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.Lmask0:
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.byte 0xff, 0x00, 0x00, 0x00
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.Lmask1:
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.byte 0x00, 0xff, 0x00, 0x00
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.Lmask2:
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.byte 0x00, 0x00, 0xff, 0x00
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.Lmask3:
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.byte 0x00, 0x00, 0x00, 0xff
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.end literal
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# Register use
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# a0/ return address
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# a1/ stack pointer
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# a2/ return value
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# a3/ src
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# a4/ len
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# a5/ mask0
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# a6/ mask1
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# a7/ mask2
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# a8/ mask3
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# a9/ tmp
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# a10/ tmp
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# a11/ dst
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# a12/ tmp
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.align 4
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.global __strncpy_user
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.type __strncpy_user,@function
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__strncpy_user:
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entry sp, 16 # minimal stack frame
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# a2/ dst, a3/ src, a4/ len
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mov a11, a2 # leave dst in return value register
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beqz a4, .Lret # if len is zero
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l32r a5, .Lmask0 # mask for byte 0
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l32r a6, .Lmask1 # mask for byte 1
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l32r a7, .Lmask2 # mask for byte 2
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l32r a8, .Lmask3 # mask for byte 3
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bbsi.l a3, 0, .Lsrc1mod2 # if only 8-bit aligned
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bbsi.l a3, 1, .Lsrc2mod4 # if only 16-bit aligned
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.Lsrcaligned: # return here when src is word-aligned
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srli a12, a4, 2 # number of loop iterations with 4B per loop
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movi a9, 3
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bnone a11, a9, .Laligned
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j .Ldstunaligned
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.Lsrc1mod2: # src address is odd
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EX(l8ui, a9, a3, 0, fixup_l) # get byte 0
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addi a3, a3, 1 # advance src pointer
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EX(s8i, a9, a11, 0, fixup_s) # store byte 0
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beqz a9, .Lret # if byte 0 is zero
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addi a11, a11, 1 # advance dst pointer
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addi a4, a4, -1 # decrement len
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beqz a4, .Lret # if len is zero
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bbci.l a3, 1, .Lsrcaligned # if src is now word-aligned
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.Lsrc2mod4: # src address is 2 mod 4
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EX(l8ui, a9, a3, 0, fixup_l) # get byte 0
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/* 1-cycle interlock */
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EX(s8i, a9, a11, 0, fixup_s) # store byte 0
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beqz a9, .Lret # if byte 0 is zero
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addi a11, a11, 1 # advance dst pointer
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addi a4, a4, -1 # decrement len
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beqz a4, .Lret # if len is zero
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EX(l8ui, a9, a3, 1, fixup_l) # get byte 0
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addi a3, a3, 2 # advance src pointer
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EX(s8i, a9, a11, 0, fixup_s) # store byte 0
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beqz a9, .Lret # if byte 0 is zero
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addi a11, a11, 1 # advance dst pointer
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addi a4, a4, -1 # decrement len
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bnez a4, .Lsrcaligned # if len is nonzero
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.Lret:
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sub a2, a11, a2 # compute strlen
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retw
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/*
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* dst is word-aligned, src is word-aligned
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*/
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.align 4 # 1 mod 4 alignment for LOOPNEZ
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.byte 0 # (0 mod 4 alignment for LBEG)
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.Laligned:
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#if XCHAL_HAVE_LOOPS
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loopnez a12, .Loop1done
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#else
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beqz a12, .Loop1done
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slli a12, a12, 2
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add a12, a12, a11 # a12 = end of last 4B chunck
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#endif
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.Loop1:
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EX(l32i, a9, a3, 0, fixup_l) # get word from src
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addi a3, a3, 4 # advance src pointer
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bnone a9, a5, .Lz0 # if byte 0 is zero
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bnone a9, a6, .Lz1 # if byte 1 is zero
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bnone a9, a7, .Lz2 # if byte 2 is zero
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EX(s32i, a9, a11, 0, fixup_s) # store word to dst
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bnone a9, a8, .Lz3 # if byte 3 is zero
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addi a11, a11, 4 # advance dst pointer
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#if !XCHAL_HAVE_LOOPS
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blt a11, a12, .Loop1
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#endif
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.Loop1done:
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bbci.l a4, 1, .L100
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# copy 2 bytes
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EX(l16ui, a9, a3, 0, fixup_l)
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addi a3, a3, 2 # advance src pointer
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#ifdef __XTENSA_EB__
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bnone a9, a7, .Lz0 # if byte 2 is zero
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bnone a9, a8, .Lz1 # if byte 3 is zero
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#else
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bnone a9, a5, .Lz0 # if byte 0 is zero
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bnone a9, a6, .Lz1 # if byte 1 is zero
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#endif
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EX(s16i, a9, a11, 0, fixup_s)
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addi a11, a11, 2 # advance dst pointer
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.L100:
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bbci.l a4, 0, .Lret
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EX(l8ui, a9, a3, 0, fixup_l)
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/* slot */
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EX(s8i, a9, a11, 0, fixup_s)
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beqz a9, .Lret # if byte is zero
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addi a11, a11, 1-3 # advance dst ptr 1, but also cancel
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# the effect of adding 3 in .Lz3 code
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/* fall thru to .Lz3 and "retw" */
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.Lz3: # byte 3 is zero
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addi a11, a11, 3 # advance dst pointer
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sub a2, a11, a2 # compute strlen
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retw
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.Lz0: # byte 0 is zero
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#ifdef __XTENSA_EB__
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movi a9, 0
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#endif /* __XTENSA_EB__ */
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EX(s8i, a9, a11, 0, fixup_s)
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sub a2, a11, a2 # compute strlen
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retw
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.Lz1: # byte 1 is zero
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#ifdef __XTENSA_EB__
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extui a9, a9, 16, 16
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#endif /* __XTENSA_EB__ */
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EX(s16i, a9, a11, 0, fixup_s)
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addi a11, a11, 1 # advance dst pointer
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sub a2, a11, a2 # compute strlen
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retw
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.Lz2: # byte 2 is zero
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#ifdef __XTENSA_EB__
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extui a9, a9, 16, 16
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#endif /* __XTENSA_EB__ */
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EX(s16i, a9, a11, 0, fixup_s)
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movi a9, 0
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EX(s8i, a9, a11, 2, fixup_s)
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addi a11, a11, 2 # advance dst pointer
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sub a2, a11, a2 # compute strlen
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retw
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.align 4 # 1 mod 4 alignment for LOOPNEZ
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.byte 0 # (0 mod 4 alignment for LBEG)
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.Ldstunaligned:
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/*
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* for now just use byte copy loop
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*/
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#if XCHAL_HAVE_LOOPS
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loopnez a4, .Lunalignedend
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#else
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beqz a4, .Lunalignedend
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add a12, a11, a4 # a12 = ending address
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#endif /* XCHAL_HAVE_LOOPS */
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.Lnextbyte:
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EX(l8ui, a9, a3, 0, fixup_l)
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addi a3, a3, 1
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EX(s8i, a9, a11, 0, fixup_s)
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beqz a9, .Lunalignedend
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addi a11, a11, 1
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#if !XCHAL_HAVE_LOOPS
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blt a11, a12, .Lnextbyte
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#endif
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.Lunalignedend:
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sub a2, a11, a2 # compute strlen
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retw
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.section .fixup, "ax"
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.align 4
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/* For now, just return -EFAULT. Future implementations might
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* like to clear remaining kernel space, like the fixup
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* implementation in memset(). Thus, we differentiate between
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* load/store fixups. */
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fixup_s:
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fixup_l:
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movi a2, -EFAULT
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retw
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