d1bef4ed5f
This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
124 lines
3.1 KiB
C
124 lines
3.1 KiB
C
/*
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* arch/v850/kernel/irq.c -- High-level interrupt handling
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*
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* Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation
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* Copyright (C) 2001,02,03,04,05 Miles Bader <miles@gnu.org>
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* Copyright (C) 1994-2000 Ralf Baechle
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* Copyright (C) 1992 Linus Torvalds
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* This file was was derived from the mips version, arch/mips/kernel/irq.c
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/random.h>
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#include <linux/seq_file.h>
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#include <asm/system.h>
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves, it doesn't deserve
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* a generic callback i think.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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printk("received IRQ %d with unknown interrupt type\n", irq);
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}
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volatile unsigned long irq_err_count, spurious_count;
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/*
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* Generic, controller-independent functions:
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int irq = *(loff_t *) v;
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if (irq == 0) {
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int cpu;
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seq_puts(p, " ");
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for (cpu=0; cpu < 1 /*smp_num_cpus*/; cpu++)
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seq_printf(p, "CPU%d ", cpu);
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seq_putc(p, '\n');
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}
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if (irq < NR_IRQS) {
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unsigned long flags;
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struct irqaction *action;
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spin_lock_irqsave(&irq_desc[irq].lock, flags);
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action = irq_desc[irq].action;
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if (action) {
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int j;
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int count = 0;
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int num = -1;
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const char *type_name = irq_desc[irq].chip->typename;
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for (j = 0; j < NR_IRQS; j++)
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if (irq_desc[j].chip->typename == type_name){
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if (irq == j)
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num = count;
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count++;
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}
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seq_printf(p, "%3d: ",irq);
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seq_printf(p, "%10u ", kstat_irqs(irq));
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if (count > 1) {
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int prec = (num >= 100 ? 3 : num >= 10 ? 2 : 1);
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seq_printf(p, " %*s%d", 14 - prec,
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type_name, num);
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} else
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seq_printf(p, " %14s", type_name);
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seq_printf(p, " %s", action->name);
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for (action=action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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}
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spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
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} else if (irq == NR_IRQS)
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seq_printf(p, "ERR: %10lu\n", irq_err_count);
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return 0;
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}
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/* Handle interrupt IRQ. REGS are the registers at the time of ther
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interrupt. */
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unsigned int handle_irq (int irq, struct pt_regs *regs)
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{
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irq_enter();
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__do_IRQ(irq, regs);
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irq_exit();
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return 1;
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}
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/* Initialize irq handling for IRQs.
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BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL
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to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */
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void __init
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init_irq_handlers (int base_irq, int num, int interval,
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struct hw_interrupt_type *irq_type)
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{
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while (num-- > 0) {
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irq_desc[base_irq].status = IRQ_DISABLED;
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irq_desc[base_irq].action = NULL;
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irq_desc[base_irq].depth = 1;
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irq_desc[base_irq].chip = irq_type;
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base_irq += interval;
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}
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}
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