ed99e2bc1d
Make csum_partial 64-bit powered. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
274 lines
4.8 KiB
ArmAsm
274 lines
4.8 KiB
ArmAsm
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Quick'n'dirty IP checksum ...
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*
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* Copyright (C) 1998, 1999 Ralf Baechle
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* Copyright (C) 1999 Silicon Graphics, Inc.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#ifdef CONFIG_64BIT
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/*
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* As we are sharing code base with the mips32 tree (which use the o32 ABI
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* register definitions). We need to redefine the register definitions from
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* the n64 ABI register naming to the o32 ABI register naming.
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*/
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#undef t0
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#undef t1
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#undef t2
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#undef t3
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#define t0 $8
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#define USE_DOUBLE
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#endif
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#ifdef USE_DOUBLE
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#define LOAD ld
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#define ADD daddu
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#define NBYTES 8
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#else
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#define LOAD lw
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#define ADD addu
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#define NBYTES 4
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#endif /* USE_DOUBLE */
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#define UNIT(unit) ((unit)*NBYTES)
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#define ADDC(sum,reg) \
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ADD sum, reg; \
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sltu v1, sum, reg; \
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ADD sum, v1
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#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \
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LOAD _t0, (offset + UNIT(0))(src); \
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LOAD _t1, (offset + UNIT(1))(src); \
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LOAD _t2, (offset + UNIT(2))(src); \
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LOAD _t3, (offset + UNIT(3))(src); \
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ADDC(sum, _t0); \
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ADDC(sum, _t1); \
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ADDC(sum, _t2); \
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ADDC(sum, _t3)
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#ifdef USE_DOUBLE
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#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
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CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3)
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#else
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#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \
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CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3); \
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CSUM_BIGCHUNK1(src, offset + 0x10, sum, _t0, _t1, _t2, _t3)
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#endif
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/*
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* a0: source address
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* a1: length of the area to checksum
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* a2: partial checksum
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*/
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#define src a0
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#define sum v0
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.text
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.set noreorder
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.align 5
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LEAF(csum_partial)
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move sum, zero
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move t7, zero
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sltiu t8, a1, 0x8
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bnez t8, small_csumcpy /* < 8 bytes to copy */
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move t2, a1
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andi t7, src, 0x1 /* odd buffer? */
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hword_align:
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beqz t7, word_align
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andi t8, src, 0x2
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lbu t0, (src)
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LONG_SUBU a1, a1, 0x1
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#ifdef __MIPSEL__
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sll t0, t0, 8
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#endif
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ADDC(sum, t0)
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PTR_ADDU src, src, 0x1
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andi t8, src, 0x2
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word_align:
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beqz t8, dword_align
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sltiu t8, a1, 56
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lhu t0, (src)
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LONG_SUBU a1, a1, 0x2
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ADDC(sum, t0)
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sltiu t8, a1, 56
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PTR_ADDU src, src, 0x2
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dword_align:
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bnez t8, do_end_words
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move t8, a1
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andi t8, src, 0x4
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beqz t8, qword_align
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andi t8, src, 0x8
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lw t0, 0x00(src)
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LONG_SUBU a1, a1, 0x4
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ADDC(sum, t0)
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PTR_ADDU src, src, 0x4
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andi t8, src, 0x8
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qword_align:
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beqz t8, oword_align
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andi t8, src, 0x10
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#ifdef USE_DOUBLE
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ld t0, 0x00(src)
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LONG_SUBU a1, a1, 0x8
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ADDC(sum, t0)
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#else
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lw t0, 0x00(src)
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lw t1, 0x04(src)
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LONG_SUBU a1, a1, 0x8
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ADDC(sum, t0)
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ADDC(sum, t1)
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#endif
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PTR_ADDU src, src, 0x8
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andi t8, src, 0x10
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oword_align:
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beqz t8, begin_movement
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LONG_SRL t8, a1, 0x7
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#ifdef USE_DOUBLE
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ld t0, 0x00(src)
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ld t1, 0x08(src)
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ADDC(sum, t0)
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ADDC(sum, t1)
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#else
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CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
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#endif
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LONG_SUBU a1, a1, 0x10
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PTR_ADDU src, src, 0x10
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LONG_SRL t8, a1, 0x7
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begin_movement:
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beqz t8, 1f
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andi t2, a1, 0x40
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move_128bytes:
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CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
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CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
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CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
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CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
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LONG_SUBU t8, t8, 0x01
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bnez t8, move_128bytes
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PTR_ADDU src, src, 0x80
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1:
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beqz t2, 1f
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andi t2, a1, 0x20
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move_64bytes:
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CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
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CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
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PTR_ADDU src, src, 0x40
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1:
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beqz t2, do_end_words
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andi t8, a1, 0x1c
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move_32bytes:
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CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
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andi t8, a1, 0x1c
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PTR_ADDU src, src, 0x20
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do_end_words:
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beqz t8, small_csumcpy
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andi t2, a1, 0x3
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LONG_SRL t8, t8, 0x2
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end_words:
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lw t0, (src)
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LONG_SUBU t8, t8, 0x1
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ADDC(sum, t0)
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bnez t8, end_words
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PTR_ADDU src, src, 0x4
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/* unknown src alignment and < 8 bytes to go */
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small_csumcpy:
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move a1, t2
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andi t0, a1, 4
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beqz t0, 1f
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andi t0, a1, 2
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/* Still a full word to go */
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ulw t1, (src)
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PTR_ADDIU src, 4
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ADDC(sum, t1)
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1: move t1, zero
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beqz t0, 1f
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andi t0, a1, 1
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/* Still a halfword to go */
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ulhu t1, (src)
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PTR_ADDIU src, 2
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1: beqz t0, 1f
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sll t1, t1, 16
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lbu t2, (src)
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nop
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#ifdef __MIPSEB__
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sll t2, t2, 8
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#endif
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or t1, t2
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1: ADDC(sum, t1)
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/* fold checksum */
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#ifdef USE_DOUBLE
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dsll32 v1, sum, 0
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daddu sum, v1
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sltu v1, sum, v1
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dsra32 sum, sum, 0
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addu sum, v1
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#endif
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sll v1, sum, 16
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addu sum, v1
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sltu v1, sum, v1
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srl sum, sum, 16
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addu sum, v1
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/* odd buffer alignment? */
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beqz t7, 1f
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nop
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sll v1, sum, 8
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srl sum, sum, 8
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or sum, v1
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andi sum, 0xffff
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1:
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.set reorder
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/* Add the passed partial csum. */
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ADDC(sum, a2)
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jr ra
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.set noreorder
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END(csum_partial)
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