kernel-aes67/arch/avr32/mach-at32ap
Hans-Christian Egtvedt 35bf50ccc8 avr32: Implement set_rate(), set_parent() and mode() for pll1
This patch is a take two of adding full functionality to PLL1 on
AT32AP7000.  This allows board-specific code and drivers to configure
and enable PLL1. This is useful when precise control over the
frequency of e.g. a genclock is needed and requested by users for the
ABDAC device.

The patch is based upon previous patches from both Haavard Skinnemoen
and David Brownell.

Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-04-19 20:40:08 -04:00
..
Kconfig
Makefile avr32: Generic clockevents support 2008-04-19 20:40:08 -04:00
at32ap.c
at32ap700x.c avr32: Implement set_rate(), set_parent() and mode() for pll1 2008-04-19 20:40:08 -04:00
clock.c
clock.h
cpufreq.c
extint.c
hmatrix.h
hsmc.c
hsmc.h
intc.c avr32: Delete mostly unused header asm/intc.h 2008-04-19 20:40:07 -04:00
intc.h
pio.c
pio.h
pm-at32ap700x.S avr32: Move sleep code into mach-at32ap 2008-04-19 20:40:07 -04:00
pm.h