1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
291 lines
6.7 KiB
C
291 lines
6.7 KiB
C
/* Minimal serial functions needed to send messages out the serial
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* port on the MBX console.
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*
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* The MBX uxes SMC1 for the serial port. We reset the port and use
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* only the first BD that EPPC-Bug set up as a character FIFO.
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*
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* Later versions (at least 1.4, maybe earlier) of the MBX EPPC-Bug
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* use COM1 instead of SMC1 as the console port. This kinda sucks
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* for the rest of the kernel, so here we force the use of SMC1 again.
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <asm/uaccess.h>
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#include <asm/mpc8xx.h>
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#include <asm/commproc.h>
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#ifdef CONFIG_MBX
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#define MBX_CSR1 ((volatile u_char *)0xfa100000)
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#define CSR1_COMEN (u_char)0x02
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#endif
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#ifdef TQM_SMC2_CONSOLE
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#define PROFF_CONS PROFF_SMC2
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#define CPM_CR_CH_CONS CPM_CR_CH_SMC2
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#define SMC_INDEX 1
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static volatile iop8xx_t *iopp = (iop8xx_t *)&(((immap_t *)IMAP_ADDR)->im_ioport);
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#else
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#define PROFF_CONS PROFF_SMC1
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#define CPM_CR_CH_CONS CPM_CR_CH_SMC1
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#define SMC_INDEX 0
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#endif
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static cpm8xx_t *cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
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unsigned long
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serial_init(int ignored, bd_t *bd)
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{
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volatile smc_t *sp;
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volatile smc_uart_t *up;
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volatile cbd_t *tbdf, *rbdf;
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volatile cpm8xx_t *cp;
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uint dpaddr, memaddr;
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#ifndef CONFIG_MBX
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uint ui;
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#endif
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cp = cpmp;
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sp = (smc_t*)&(cp->cp_smc[SMC_INDEX]);
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up = (smc_uart_t *)&cp->cp_dparam[PROFF_CONS];
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/* Disable transmitter/receiver.
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*/
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sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
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#ifdef CONFIG_FADS
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/* Enable SMC1/2 transceivers.
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*/
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*((volatile uint *)BCSR1) &= ~(BCSR1_RS232EN_1|BCSR1_RS232EN_2);
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#endif
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#ifndef CONFIG_MBX
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{
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/* Initialize SMCx and use it for the console port.
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*/
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/* Enable SDMA.
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*/
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((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1;
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#ifdef TQM_SMC2_CONSOLE
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/* Use Port A for SMC2 instead of other functions.
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*/
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iopp->iop_papar |= 0x00c0;
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iopp->iop_padir &= ~0x00c0;
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iopp->iop_paodr &= ~0x00c0;
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#else
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/* Use Port B for SMCs instead of other functions.
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*/
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cp->cp_pbpar |= 0x00000cc0;
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cp->cp_pbdir &= ~0x00000cc0;
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cp->cp_pbodr &= ~0x00000cc0;
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#endif
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/* Allocate space for two buffer descriptors in the DP ram.
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* For now, this address seems OK, but it may have to
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* change with newer versions of the firmware.
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*/
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dpaddr = 0x0800;
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/* Grab a few bytes from the top of memory for SMC FIFOs.
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*/
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memaddr = (bd->bi_memsize - 32) & ~15;
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/* Set the physical address of the host memory buffers in
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* the buffer descriptors.
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*/
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rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
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rbdf->cbd_bufaddr = memaddr;
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rbdf->cbd_sc = 0;
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tbdf = rbdf + 1;
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tbdf->cbd_bufaddr = memaddr+4;
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tbdf->cbd_sc = 0;
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/* Set up the uart parameters in the parameter ram.
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*/
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up->smc_rbase = dpaddr;
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up->smc_tbase = dpaddr+sizeof(cbd_t);
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up->smc_rfcr = SMC_EB;
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up->smc_tfcr = SMC_EB;
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/* Set UART mode, 8 bit, no parity, one stop.
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* Enable receive and transmit.
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*/
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sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
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/* Mask all interrupts and remove anything pending.
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*/
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sp->smc_smcm = 0;
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sp->smc_smce = 0xff;
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/* Set up the baud rate generator.
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* See 8xx_io/commproc.c for details.
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* This wires BRG1 to SMC1 and BRG2 to SMC2;
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*/
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cp->cp_simode = 0x10000000;
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ui = bd->bi_intfreq / 16 / bd->bi_baudrate;
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#ifdef TQM_SMC2_CONSOLE
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cp->cp_brgc2 =
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#else
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cp->cp_brgc1 =
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#endif
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((ui - 1) < 4096)
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? (((ui - 1) << 1) | CPM_BRG_EN)
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: ((((ui / 16) - 1) << 1) | CPM_BRG_EN | CPM_BRG_DIV16);
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#else /* CONFIG_MBX */
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if (*MBX_CSR1 & CSR1_COMEN) {
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/* COM1 is enabled. Initialize SMC1 and use it for
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* the console port.
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*/
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/* Enable SDMA.
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*/
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((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1;
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/* Use Port B for SMCs instead of other functions.
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*/
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cp->cp_pbpar |= 0x00000cc0;
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cp->cp_pbdir &= ~0x00000cc0;
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cp->cp_pbodr &= ~0x00000cc0;
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/* Allocate space for two buffer descriptors in the DP ram.
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* For now, this address seems OK, but it may have to
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* change with newer versions of the firmware.
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*/
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dpaddr = 0x0800;
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/* Grab a few bytes from the top of memory. EPPC-Bug isn't
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* running any more, so we can do this.
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*/
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memaddr = (bd->bi_memsize - 32) & ~15;
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/* Set the physical address of the host memory buffers in
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* the buffer descriptors.
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*/
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rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
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rbdf->cbd_bufaddr = memaddr;
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rbdf->cbd_sc = 0;
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tbdf = rbdf + 1;
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tbdf->cbd_bufaddr = memaddr+4;
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tbdf->cbd_sc = 0;
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/* Set up the uart parameters in the parameter ram.
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*/
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up->smc_rbase = dpaddr;
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up->smc_tbase = dpaddr+sizeof(cbd_t);
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up->smc_rfcr = SMC_EB;
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up->smc_tfcr = SMC_EB;
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/* Set UART mode, 8 bit, no parity, one stop.
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* Enable receive and transmit.
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*/
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sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
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/* Mask all interrupts and remove anything pending.
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*/
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sp->smc_smcm = 0;
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sp->smc_smce = 0xff;
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/* Set up the baud rate generator.
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* See 8xx_io/commproc.c for details.
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*/
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cp->cp_simode = 0x10000000;
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cp->cp_brgc1 =
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(((bd->bi_intfreq/16) / 9600) << 1) | CPM_BRG_EN;
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/* Enable SMC1 for console output.
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*/
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*MBX_CSR1 &= ~CSR1_COMEN;
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}
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else {
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#endif /* ndef CONFIG_MBX */
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/* SMCx is used as console port.
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*/
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tbdf = (cbd_t *)&cp->cp_dpmem[up->smc_tbase];
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rbdf = (cbd_t *)&cp->cp_dpmem[up->smc_rbase];
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/* Issue a stop transmit, and wait for it.
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*/
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cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_CONS,
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CPM_CR_STOP_TX) | CPM_CR_FLG;
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while (cp->cp_cpcr & CPM_CR_FLG);
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}
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/* Make the first buffer the only buffer.
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*/
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tbdf->cbd_sc |= BD_SC_WRAP;
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rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
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/* Single character receive.
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*/
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up->smc_mrblr = 1;
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up->smc_maxidl = 0;
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/* Initialize Tx/Rx parameters.
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*/
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cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_CONS, CPM_CR_INIT_TRX) | CPM_CR_FLG;
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while (cp->cp_cpcr & CPM_CR_FLG);
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/* Enable transmitter/receiver.
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*/
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sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
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/* This is ignored.
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*/
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return 0;
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}
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void
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serial_putc(void *ignored, const char c)
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{
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volatile cbd_t *tbdf;
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volatile char *buf;
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volatile smc_uart_t *up;
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS];
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tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
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/* Wait for last character to go.
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*/
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buf = (char *)tbdf->cbd_bufaddr;
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while (tbdf->cbd_sc & BD_SC_READY);
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*buf = c;
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tbdf->cbd_datlen = 1;
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tbdf->cbd_sc |= BD_SC_READY;
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}
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char
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serial_getc(void *ignored)
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{
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volatile cbd_t *rbdf;
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volatile char *buf;
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volatile smc_uart_t *up;
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char c;
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS];
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rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
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/* Wait for character to show up.
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*/
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buf = (char *)rbdf->cbd_bufaddr;
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while (rbdf->cbd_sc & BD_SC_EMPTY);
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c = *buf;
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rbdf->cbd_sc |= BD_SC_EMPTY;
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return(c);
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}
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int
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serial_tstc(void *ignored)
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{
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volatile cbd_t *rbdf;
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volatile smc_uart_t *up;
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS];
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rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
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return(!(rbdf->cbd_sc & BD_SC_EMPTY));
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}
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