8426e1f6af
Introduce an atomic_inc_not_zero operation. Make this a special case of atomic_add_unless because lockless pagecache actually wants atomic_inc_not_negativeone due to its offset refcount. Signed-off-by: Nick Piggin <npiggin@suse.de> Cc: "Paul E. McKenney" <paulmck@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
220 lines
6.1 KiB
C
220 lines
6.1 KiB
C
#ifndef __ARCH_S390_ATOMIC__
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#define __ARCH_S390_ATOMIC__
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/*
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* include/asm-s390/atomic.h
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*
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* S390 version
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* Copyright (C) 1999-2003 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
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* Denis Joseph Barrow,
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* Arnd Bergmann (arndb@de.ibm.com)
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*
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* Derived from "include/asm-i386/bitops.h"
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* Copyright (C) 1992, Linus Torvalds
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*
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*/
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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* S390 uses 'Compare And Swap' for atomicity in SMP enviroment
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*/
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typedef struct {
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volatile int counter;
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} __attribute__ ((aligned (4))) atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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#ifdef __KERNEL__
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#define __CS_LOOP(ptr, op_val, op_string) ({ \
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typeof(ptr->counter) old_val, new_val; \
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__asm__ __volatile__(" l %0,0(%3)\n" \
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"0: lr %1,%0\n" \
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op_string " %1,%4\n" \
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" cs %0,%1,0(%3)\n" \
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" jl 0b" \
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: "=&d" (old_val), "=&d" (new_val), \
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"=m" (((atomic_t *)(ptr))->counter) \
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: "a" (ptr), "d" (op_val), \
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"m" (((atomic_t *)(ptr))->counter) \
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: "cc", "memory" ); \
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new_val; \
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})
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#define atomic_read(v) ((v)->counter)
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#define atomic_set(v,i) (((v)->counter) = (i))
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static __inline__ void atomic_add(int i, atomic_t * v)
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{
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__CS_LOOP(v, i, "ar");
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}
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static __inline__ int atomic_add_return(int i, atomic_t * v)
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{
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return __CS_LOOP(v, i, "ar");
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}
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static __inline__ int atomic_add_negative(int i, atomic_t * v)
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{
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return __CS_LOOP(v, i, "ar") < 0;
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}
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static __inline__ void atomic_sub(int i, atomic_t * v)
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{
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__CS_LOOP(v, i, "sr");
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}
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static __inline__ int atomic_sub_return(int i, atomic_t * v)
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{
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return __CS_LOOP(v, i, "sr");
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}
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static __inline__ void atomic_inc(volatile atomic_t * v)
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{
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__CS_LOOP(v, 1, "ar");
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}
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static __inline__ int atomic_inc_return(volatile atomic_t * v)
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{
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return __CS_LOOP(v, 1, "ar");
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}
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static __inline__ int atomic_inc_and_test(volatile atomic_t * v)
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{
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return __CS_LOOP(v, 1, "ar") == 0;
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}
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static __inline__ void atomic_dec(volatile atomic_t * v)
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{
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__CS_LOOP(v, 1, "sr");
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}
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static __inline__ int atomic_dec_return(volatile atomic_t * v)
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{
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return __CS_LOOP(v, 1, "sr");
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}
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static __inline__ int atomic_dec_and_test(volatile atomic_t * v)
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{
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return __CS_LOOP(v, 1, "sr") == 0;
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}
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static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t * v)
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{
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__CS_LOOP(v, ~mask, "nr");
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}
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static __inline__ void atomic_set_mask(unsigned long mask, atomic_t * v)
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{
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__CS_LOOP(v, mask, "or");
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}
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#undef __CS_LOOP
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#ifdef __s390x__
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typedef struct {
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volatile long long counter;
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} __attribute__ ((aligned (8))) atomic64_t;
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#define ATOMIC64_INIT(i) { (i) }
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#define __CSG_LOOP(ptr, op_val, op_string) ({ \
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typeof(ptr->counter) old_val, new_val; \
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__asm__ __volatile__(" lg %0,0(%3)\n" \
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"0: lgr %1,%0\n" \
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op_string " %1,%4\n" \
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" csg %0,%1,0(%3)\n" \
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" jl 0b" \
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: "=&d" (old_val), "=&d" (new_val), \
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"=m" (((atomic_t *)(ptr))->counter) \
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: "a" (ptr), "d" (op_val), \
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"m" (((atomic_t *)(ptr))->counter) \
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: "cc", "memory" ); \
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new_val; \
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})
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#define atomic64_read(v) ((v)->counter)
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#define atomic64_set(v,i) (((v)->counter) = (i))
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static __inline__ void atomic64_add(long long i, atomic64_t * v)
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{
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__CSG_LOOP(v, i, "agr");
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}
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static __inline__ long long atomic64_add_return(long long i, atomic64_t * v)
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{
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return __CSG_LOOP(v, i, "agr");
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}
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static __inline__ long long atomic64_add_negative(long long i, atomic64_t * v)
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{
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return __CSG_LOOP(v, i, "agr") < 0;
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}
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static __inline__ void atomic64_sub(long long i, atomic64_t * v)
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{
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__CSG_LOOP(v, i, "sgr");
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}
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static __inline__ void atomic64_inc(volatile atomic64_t * v)
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{
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__CSG_LOOP(v, 1, "agr");
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}
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static __inline__ long long atomic64_inc_return(volatile atomic64_t * v)
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{
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return __CSG_LOOP(v, 1, "agr");
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}
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static __inline__ long long atomic64_inc_and_test(volatile atomic64_t * v)
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{
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return __CSG_LOOP(v, 1, "agr") == 0;
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}
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static __inline__ void atomic64_dec(volatile atomic64_t * v)
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{
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__CSG_LOOP(v, 1, "sgr");
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}
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static __inline__ long long atomic64_dec_return(volatile atomic64_t * v)
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{
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return __CSG_LOOP(v, 1, "sgr");
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}
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static __inline__ long long atomic64_dec_and_test(volatile atomic64_t * v)
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{
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return __CSG_LOOP(v, 1, "sgr") == 0;
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}
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static __inline__ void atomic64_clear_mask(unsigned long mask, atomic64_t * v)
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{
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__CSG_LOOP(v, ~mask, "ngr");
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}
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static __inline__ void atomic64_set_mask(unsigned long mask, atomic64_t * v)
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{
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__CSG_LOOP(v, mask, "ogr");
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}
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#undef __CSG_LOOP
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#endif
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/*
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returns 0 if expected_oldval==value in *v ( swap was successful )
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returns 1 if unsuccessful.
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This is non-portable, use bitops or spinlocks instead!
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*/
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static __inline__ int
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atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v)
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{
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int retval;
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__asm__ __volatile__(
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" lr %0,%3\n"
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" cs %0,%4,0(%2)\n"
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" ipm %0\n"
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" srl %0,28\n"
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"0:"
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: "=&d" (retval), "=m" (v->counter)
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: "a" (v), "d" (expected_oldval) , "d" (new_val),
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"m" (v->counter) : "cc", "memory" );
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return retval;
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}
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#define atomic_cmpxchg(v, o, n) (atomic_compare_and_swap((o), (n), &((v)->counter)))
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#define atomic_add_unless(v, a, u) \
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({ \
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int c, old; \
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c = atomic_read(v); \
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while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
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c = old; \
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c != (u); \
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})
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__after_atomic_dec() smp_mb()
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#define smp_mb__before_atomic_inc() smp_mb()
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#define smp_mb__after_atomic_inc() smp_mb()
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#endif /* __KERNEL__ */
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#endif /* __ARCH_S390_ATOMIC__ */
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