b3f827cb0f
Add the regs_return_value() macro to extract the return value in an architecture agnostic manner, given the pt_regs. Other architecture maintainers may want to add similar helpers. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
349 lines
12 KiB
C
349 lines
12 KiB
C
#ifndef _ASM_IA64_PTRACE_H
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#define _ASM_IA64_PTRACE_H
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/*
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* Copyright (C) 1998-2004 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* Stephane Eranian <eranian@hpl.hp.com>
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* Copyright (C) 2003 Intel Co
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* Suresh Siddha <suresh.b.siddha@intel.com>
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* Fenghua Yu <fenghua.yu@intel.com>
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* Arun Sharma <arun.sharma@intel.com>
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*
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* 12/07/98 S. Eranian added pt_regs & switch_stack
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* 12/21/98 D. Mosberger updated to match latest code
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* 6/17/99 D. Mosberger added second unat member to "struct switch_stack"
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*
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*/
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/*
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* When a user process is blocked, its state looks as follows:
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*
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* +----------------------+ ------- IA64_STK_OFFSET
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* | | ^
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* | struct pt_regs | |
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* | | |
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* +----------------------+ |
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* | | |
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* | memory stack | |
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* | (growing downwards) | |
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* //.....................// |
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* |
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* //.....................// |
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* | | |
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* +----------------------+ |
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* | struct switch_stack | |
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* | | |
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* +----------------------+ |
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* | | |
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* //.....................// |
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* |
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* //.....................// |
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* | | |
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* | register stack | |
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* | (growing upwards) | |
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* | | |
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* +----------------------+ | --- IA64_RBS_OFFSET
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* | struct thread_info | | ^
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* +----------------------+ | |
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* | | | |
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* | struct task_struct | | |
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* current -> | | | |
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* +----------------------+ -------
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*
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* Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
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* This is because ar.ec is saved as part of ar.pfs.
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*/
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#include <asm/fpu.h>
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#ifdef __KERNEL__
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#ifndef ASM_OFFSETS_C
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#include <asm/asm-offsets.h>
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#endif
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/*
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* Base-2 logarithm of number of pages to allocate per task structure
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* (including register backing store and memory stack):
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*/
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#if defined(CONFIG_IA64_PAGE_SIZE_4KB)
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# define KERNEL_STACK_SIZE_ORDER 3
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#elif defined(CONFIG_IA64_PAGE_SIZE_8KB)
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# define KERNEL_STACK_SIZE_ORDER 2
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#elif defined(CONFIG_IA64_PAGE_SIZE_16KB)
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# define KERNEL_STACK_SIZE_ORDER 1
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#else
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# define KERNEL_STACK_SIZE_ORDER 0
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#endif
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#define IA64_RBS_OFFSET ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 15) & ~15)
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#define IA64_STK_OFFSET ((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE)
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#define KERNEL_STACK_SIZE IA64_STK_OFFSET
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#endif /* __KERNEL__ */
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#ifndef __ASSEMBLY__
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/*
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* This struct defines the way the registers are saved on system
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* calls.
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*
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* We don't save all floating point register because the kernel
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* is compiled to use only a very small subset, so the other are
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* untouched.
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*
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* THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
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* (because the memory stack pointer MUST ALWAYS be aligned this way)
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*
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*/
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struct pt_regs {
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/* The following registers are saved by SAVE_MIN: */
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unsigned long b6; /* scratch */
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unsigned long b7; /* scratch */
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unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
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unsigned long ar_ssd; /* reserved for future use (scratch) */
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unsigned long r8; /* scratch (return value register 0) */
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unsigned long r9; /* scratch (return value register 1) */
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unsigned long r10; /* scratch (return value register 2) */
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unsigned long r11; /* scratch (return value register 3) */
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unsigned long cr_ipsr; /* interrupted task's psr */
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unsigned long cr_iip; /* interrupted task's instruction pointer */
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/*
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* interrupted task's function state; if bit 63 is cleared, it
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* contains syscall's ar.pfs.pfm:
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*/
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unsigned long cr_ifs;
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unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
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unsigned long ar_pfs; /* prev function state */
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unsigned long ar_rsc; /* RSE configuration */
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/* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
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unsigned long ar_rnat; /* RSE NaT */
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unsigned long ar_bspstore; /* RSE bspstore */
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unsigned long pr; /* 64 predicate registers (1 bit each) */
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unsigned long b0; /* return pointer (bp) */
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unsigned long loadrs; /* size of dirty partition << 16 */
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unsigned long r1; /* the gp pointer */
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unsigned long r12; /* interrupted task's memory stack pointer */
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unsigned long r13; /* thread pointer */
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unsigned long ar_fpsr; /* floating point status (preserved) */
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unsigned long r15; /* scratch */
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/* The remaining registers are NOT saved for system calls. */
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unsigned long r14; /* scratch */
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unsigned long r2; /* scratch */
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unsigned long r3; /* scratch */
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/* The following registers are saved by SAVE_REST: */
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unsigned long r16; /* scratch */
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unsigned long r17; /* scratch */
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unsigned long r18; /* scratch */
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unsigned long r19; /* scratch */
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unsigned long r20; /* scratch */
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unsigned long r21; /* scratch */
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unsigned long r22; /* scratch */
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unsigned long r23; /* scratch */
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unsigned long r24; /* scratch */
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unsigned long r25; /* scratch */
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unsigned long r26; /* scratch */
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unsigned long r27; /* scratch */
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unsigned long r28; /* scratch */
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unsigned long r29; /* scratch */
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unsigned long r30; /* scratch */
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unsigned long r31; /* scratch */
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unsigned long ar_ccv; /* compare/exchange value (scratch) */
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/*
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* Floating point registers that the kernel considers scratch:
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*/
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struct ia64_fpreg f6; /* scratch */
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struct ia64_fpreg f7; /* scratch */
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struct ia64_fpreg f8; /* scratch */
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struct ia64_fpreg f9; /* scratch */
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struct ia64_fpreg f10; /* scratch */
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struct ia64_fpreg f11; /* scratch */
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};
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/*
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* This structure contains the addition registers that need to
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* preserved across a context switch. This generally consists of
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* "preserved" registers.
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*/
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struct switch_stack {
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unsigned long caller_unat; /* user NaT collection register (preserved) */
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unsigned long ar_fpsr; /* floating-point status register */
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struct ia64_fpreg f2; /* preserved */
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struct ia64_fpreg f3; /* preserved */
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struct ia64_fpreg f4; /* preserved */
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struct ia64_fpreg f5; /* preserved */
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struct ia64_fpreg f12; /* scratch, but untouched by kernel */
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struct ia64_fpreg f13; /* scratch, but untouched by kernel */
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struct ia64_fpreg f14; /* scratch, but untouched by kernel */
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struct ia64_fpreg f15; /* scratch, but untouched by kernel */
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struct ia64_fpreg f16; /* preserved */
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struct ia64_fpreg f17; /* preserved */
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struct ia64_fpreg f18; /* preserved */
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struct ia64_fpreg f19; /* preserved */
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struct ia64_fpreg f20; /* preserved */
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struct ia64_fpreg f21; /* preserved */
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struct ia64_fpreg f22; /* preserved */
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struct ia64_fpreg f23; /* preserved */
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struct ia64_fpreg f24; /* preserved */
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struct ia64_fpreg f25; /* preserved */
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struct ia64_fpreg f26; /* preserved */
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struct ia64_fpreg f27; /* preserved */
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struct ia64_fpreg f28; /* preserved */
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struct ia64_fpreg f29; /* preserved */
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struct ia64_fpreg f30; /* preserved */
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struct ia64_fpreg f31; /* preserved */
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unsigned long r4; /* preserved */
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unsigned long r5; /* preserved */
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unsigned long r6; /* preserved */
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unsigned long r7; /* preserved */
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unsigned long b0; /* so we can force a direct return in copy_thread */
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unsigned long b1;
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unsigned long b2;
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unsigned long b3;
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unsigned long b4;
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unsigned long b5;
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unsigned long ar_pfs; /* previous function state */
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unsigned long ar_lc; /* loop counter (preserved) */
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unsigned long ar_unat; /* NaT bits for r4-r7 */
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unsigned long ar_rnat; /* RSE NaT collection register */
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unsigned long ar_bspstore; /* RSE dirty base (preserved) */
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unsigned long pr; /* 64 predicate registers (1 bit each) */
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};
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#ifdef __KERNEL__
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#include <asm/current.h>
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#include <asm/page.h>
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#define __ARCH_SYS_PTRACE 1
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/*
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* We use the ia64_psr(regs)->ri to determine which of the three
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* instructions in bundle (16 bytes) took the sample. Generate
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* the canonical representation by adding to instruction pointer.
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*/
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# define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri)
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#define regs_return_value(regs) ((regs)->r8)
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/* Conserve space in histogram by encoding slot bits in address
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* bits 2 and 3 rather than bits 0 and 1.
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*/
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#define profile_pc(regs) \
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({ \
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unsigned long __ip = instruction_pointer(regs); \
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(__ip & ~3UL) + ((__ip & 3UL) << 2); \
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})
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/* given a pointer to a task_struct, return the user's pt_regs */
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# define task_pt_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1)
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# define ia64_psr(regs) ((struct ia64_psr *) &(regs)->cr_ipsr)
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# define user_mode(regs) (((struct ia64_psr *) &(regs)->cr_ipsr)->cpl != 0)
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# define user_stack(task,regs) ((long) regs - (long) task == IA64_STK_OFFSET - sizeof(*regs))
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# define fsys_mode(task,regs) \
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({ \
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struct task_struct *_task = (task); \
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struct pt_regs *_regs = (regs); \
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!user_mode(_regs) && user_stack(_task, _regs); \
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})
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/*
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* System call handlers that, upon successful completion, need to return a negative value
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* should call force_successful_syscall_return() right before returning. On architectures
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* where the syscall convention provides for a separate error flag (e.g., alpha, ia64,
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* ppc{,64}, sparc{,64}, possibly others), this macro can be used to ensure that the error
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* flag will not get set. On architectures which do not support a separate error flag,
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* the macro is a no-op and the spurious error condition needs to be filtered out by some
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* other means (e.g., in user-level, by passing an extra argument to the syscall handler,
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* or something along those lines).
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*
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* On ia64, we can clear the user's pt_regs->r8 to force a successful syscall.
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*/
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# define force_successful_syscall_return() (task_pt_regs(current)->r8 = 0)
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struct task_struct; /* forward decl */
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struct unw_frame_info; /* forward decl */
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extern void show_regs (struct pt_regs *);
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extern void ia64_do_show_stack (struct unw_frame_info *, void *);
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extern unsigned long ia64_get_user_rbs_end (struct task_struct *, struct pt_regs *,
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unsigned long *);
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extern long ia64_peek (struct task_struct *, struct switch_stack *, unsigned long,
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unsigned long, long *);
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extern long ia64_poke (struct task_struct *, struct switch_stack *, unsigned long,
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unsigned long, long);
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extern void ia64_flush_fph (struct task_struct *);
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extern void ia64_sync_fph (struct task_struct *);
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extern long ia64_sync_user_rbs (struct task_struct *, struct switch_stack *,
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unsigned long, unsigned long);
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/* get nat bits for scratch registers such that bit N==1 iff scratch register rN is a NaT */
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extern unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat);
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/* put nat bits for scratch registers such that scratch register rN is a NaT iff bit N==1 */
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extern unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat);
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extern void ia64_increment_ip (struct pt_regs *pt);
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extern void ia64_decrement_ip (struct pt_regs *pt);
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#endif /* !__KERNEL__ */
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/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
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struct pt_all_user_regs {
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unsigned long nat;
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unsigned long cr_iip;
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unsigned long cfm;
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unsigned long cr_ipsr;
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unsigned long pr;
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unsigned long gr[32];
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unsigned long br[8];
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unsigned long ar[128];
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struct ia64_fpreg fr[128];
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};
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#endif /* !__ASSEMBLY__ */
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/* indices to application-registers array in pt_all_user_regs */
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#define PT_AUR_RSC 16
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#define PT_AUR_BSP 17
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#define PT_AUR_BSPSTORE 18
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#define PT_AUR_RNAT 19
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#define PT_AUR_CCV 32
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#define PT_AUR_UNAT 36
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#define PT_AUR_FPSR 40
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#define PT_AUR_PFS 64
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#define PT_AUR_LC 65
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#define PT_AUR_EC 66
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/*
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* The numbers chosen here are somewhat arbitrary but absolutely MUST
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* not overlap with any of the number assigned in <linux/ptrace.h>.
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*/
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#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
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#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>) */
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#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>) */
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#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */
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#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */
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#define PTRACE_OLDSETOPTIONS 21
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#endif /* _ASM_IA64_PTRACE_H */
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