77933d7276
`gcc -W' likes to complain if the static keyword is not at the beginning of the declaration. This patch fixes all remaining occurrences of "inline static" up with "static inline" in the entire kernel tree (140 occurrences in 47 files). While making this change I came across a few lines with trailing whitespace that I also fixed up, I have also added or removed a blank line or two here and there, but there are no functional changes in the patch. Signed-off-by: Jesper Juhl <juhl-lkml@dif.dk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
563 lines
16 KiB
C
563 lines
16 KiB
C
/*
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* Driver for Digigram VX soundcards
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*
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* Hardware core part
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*
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* Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __SOUND_VX_COMMON_H
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#define __SOUND_VX_COMMON_H
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#include <sound/pcm.h>
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#include <sound/hwdep.h>
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#include <linux/interrupt.h>
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#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
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#if !defined(CONFIG_USE_VXLOADER) && !defined(CONFIG_SND_VX_LIB) /* built-in kernel */
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#define SND_VX_FW_LOADER /* use the standard firmware loader */
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#endif
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#endif
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struct firmware;
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struct device;
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typedef struct snd_vx_core vx_core_t;
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typedef struct vx_pipe vx_pipe_t;
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#define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
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/*
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*/
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#define SIZE_MAX_CMD 0x10
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#define SIZE_MAX_STATUS 0x10
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struct vx_rmh {
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u16 LgCmd; /* length of the command to send (WORDs) */
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u16 LgStat; /* length of the status received (WORDs) */
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u32 Cmd[SIZE_MAX_CMD];
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u32 Stat[SIZE_MAX_STATUS];
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u16 DspStat; /* status type, RMP_SSIZE_XXX */
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};
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typedef u64 pcx_time_t;
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#define VX_MAX_PIPES 16
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#define VX_MAX_PERIODS 32
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#define VX_MAX_CODECS 2
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struct vx_ibl_info {
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int size; /* the current IBL size (0 = query) in bytes */
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int max_size; /* max. IBL size in bytes */
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int min_size; /* min. IBL size in bytes */
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int granularity; /* granularity */
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};
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struct vx_pipe {
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int number;
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unsigned int is_capture: 1;
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unsigned int data_mode: 1;
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unsigned int running: 1;
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unsigned int prepared: 1;
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int channels;
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unsigned int differed_type;
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pcx_time_t pcx_time;
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snd_pcm_substream_t *substream;
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int hbuf_size; /* H-buffer size in bytes */
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int buffer_bytes; /* the ALSA pcm buffer size in bytes */
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int period_bytes; /* the ALSA pcm period size in bytes */
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int hw_ptr; /* the current hardware pointer in bytes */
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int position; /* the current position in frames (playback only) */
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int transferred; /* the transferred size (per period) in frames */
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int align; /* size of alignment */
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u64 cur_count; /* current sample position (for playback) */
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unsigned int references; /* an output pipe may be used for monitoring and/or playback */
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vx_pipe_t *monitoring_pipe; /* pointer to the monitoring pipe (capture pipe only)*/
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struct tasklet_struct start_tq;
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};
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struct snd_vx_ops {
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/* low-level i/o */
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unsigned char (*in8)(vx_core_t *chip, int reg);
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unsigned int (*in32)(vx_core_t *chip, int reg);
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void (*out8)(vx_core_t *chip, int reg, unsigned char val);
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void (*out32)(vx_core_t *chip, int reg, unsigned int val);
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/* irq */
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int (*test_and_ack)(vx_core_t *chip);
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void (*validate_irq)(vx_core_t *chip, int enable);
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/* codec */
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void (*write_codec)(vx_core_t *chip, int codec, unsigned int data);
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void (*akm_write)(vx_core_t *chip, int reg, unsigned int data);
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void (*reset_codec)(vx_core_t *chip);
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void (*change_audio_source)(vx_core_t *chip, int src);
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void (*set_clock_source)(vx_core_t *chp, int src);
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/* chip init */
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int (*load_dsp)(vx_core_t *chip, int idx, const struct firmware *fw);
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void (*reset_dsp)(vx_core_t *chip);
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void (*reset_board)(vx_core_t *chip, int cold_reset);
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int (*add_controls)(vx_core_t *chip);
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/* pcm */
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void (*dma_write)(vx_core_t *chip, snd_pcm_runtime_t *runtime,
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vx_pipe_t *pipe, int count);
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void (*dma_read)(vx_core_t *chip, snd_pcm_runtime_t *runtime,
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vx_pipe_t *pipe, int count);
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};
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struct snd_vx_hardware {
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const char *name;
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int type; /* VX_TYPE_XXX */
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/* hardware specs */
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unsigned int num_codecs;
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unsigned int num_ins;
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unsigned int num_outs;
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unsigned int output_level_max;
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};
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/* hwdep id string */
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#define SND_VX_HWDEP_ID "VX Loader"
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/* hardware type */
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enum {
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/* VX222 PCI */
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VX_TYPE_BOARD, /* old VX222 PCI */
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VX_TYPE_V2, /* VX222 V2 PCI */
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VX_TYPE_MIC, /* VX222 Mic PCI */
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/* VX-pocket */
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VX_TYPE_VXPOCKET, /* VXpocket V2 */
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VX_TYPE_VXP440, /* VXpocket 440 */
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VX_TYPE_NUMS
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};
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/* chip status */
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enum {
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VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
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VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
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VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
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VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
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VX_STAT_IS_STALE = (1 << 15) /* device is stale */
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};
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/* min/max values for analog output for old codecs */
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#define VX_ANALOG_OUT_LEVEL_MAX 0xe3
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struct snd_vx_core {
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/* ALSA stuff */
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snd_card_t *card;
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snd_pcm_t *pcm[VX_MAX_CODECS];
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int type; /* VX_TYPE_XXX */
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int irq;
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/* ports are defined externally */
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/* low-level functions */
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struct snd_vx_hardware *hw;
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struct snd_vx_ops *ops;
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spinlock_t lock;
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spinlock_t irq_lock;
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struct tasklet_struct tq;
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unsigned int chip_status;
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unsigned int pcm_running;
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struct device *dev;
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snd_hwdep_t *hwdep;
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struct vx_rmh irq_rmh; /* RMH used in interrupts */
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unsigned int audio_info; /* see VX_AUDIO_INFO */
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unsigned int audio_ins;
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unsigned int audio_outs;
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struct vx_pipe **playback_pipes;
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struct vx_pipe **capture_pipes;
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/* clock and audio sources */
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unsigned int audio_source; /* current audio input source */
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unsigned int audio_source_target;
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unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
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unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
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unsigned int freq; /* current frequency */
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unsigned int freq_detected; /* detected frequency from digital in */
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unsigned int uer_detected; /* VX_UER_MODE_XXX */
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unsigned int uer_bits; /* IEC958 status bits */
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struct vx_ibl_info ibl; /* IBL information */
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/* mixer setting */
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int output_level[VX_MAX_CODECS][2]; /* analog output level */
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int audio_gain[2][4]; /* digital audio level (playback/capture) */
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unsigned char audio_active[4]; /* mute/unmute on digital playback */
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int audio_monitor[4]; /* playback hw-monitor level */
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unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
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struct semaphore mixer_mutex;
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const struct firmware *firmware[4]; /* loaded firmware data */
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};
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/*
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* constructor
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*/
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vx_core_t *snd_vx_create(snd_card_t *card, struct snd_vx_hardware *hw,
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struct snd_vx_ops *ops, int extra_size);
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int snd_vx_setup_firmware(vx_core_t *chip);
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int snd_vx_load_boot_image(vx_core_t *chip, const struct firmware *dsp);
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int snd_vx_dsp_boot(vx_core_t *chip, const struct firmware *dsp);
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int snd_vx_dsp_load(vx_core_t *chip, const struct firmware *dsp);
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void snd_vx_free_firmware(vx_core_t *chip);
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/*
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* interrupt handler; exported for pcmcia
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*/
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irqreturn_t snd_vx_irq_handler(int irq, void *dev, struct pt_regs *regs);
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/*
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* lowlevel functions
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*/
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static inline int vx_test_and_ack(vx_core_t *chip)
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{
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snd_assert(chip->ops->test_and_ack, return -ENXIO);
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return chip->ops->test_and_ack(chip);
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}
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static inline void vx_validate_irq(vx_core_t *chip, int enable)
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{
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snd_assert(chip->ops->validate_irq, return);
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chip->ops->validate_irq(chip, enable);
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}
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static inline unsigned char snd_vx_inb(vx_core_t *chip, int reg)
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{
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snd_assert(chip->ops->in8, return 0);
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return chip->ops->in8(chip, reg);
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}
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static inline unsigned int snd_vx_inl(vx_core_t *chip, int reg)
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{
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snd_assert(chip->ops->in32, return 0);
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return chip->ops->in32(chip, reg);
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}
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static inline void snd_vx_outb(vx_core_t *chip, int reg, unsigned char val)
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{
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snd_assert(chip->ops->out8, return);
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chip->ops->out8(chip, reg, val);
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}
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static inline void snd_vx_outl(vx_core_t *chip, int reg, unsigned int val)
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{
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snd_assert(chip->ops->out32, return);
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chip->ops->out32(chip, reg, val);
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}
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#define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
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#define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
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#define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
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#define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
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void snd_vx_delay(vx_core_t *chip, int msec);
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static inline void vx_reset_dsp(vx_core_t *chip)
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{
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snd_assert(chip->ops->reset_dsp, return);
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chip->ops->reset_dsp(chip);
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}
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int vx_send_msg(vx_core_t *chip, struct vx_rmh *rmh);
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int vx_send_msg_nolock(vx_core_t *chip, struct vx_rmh *rmh);
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int vx_send_rih(vx_core_t *chip, int cmd);
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int vx_send_rih_nolock(vx_core_t *chip, int cmd);
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void vx_reset_codec(vx_core_t *chip, int cold_reset);
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/*
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* check the bit on the specified register
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* returns zero if a bit matches, or a negative error code.
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* exported for vxpocket driver
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*/
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int snd_vx_check_reg_bit(vx_core_t *chip, int reg, int mask, int bit, int time);
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#define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
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#define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
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#define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
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/*
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* pseudo-DMA transfer
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*/
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static inline void vx_pseudo_dma_write(vx_core_t *chip, snd_pcm_runtime_t *runtime,
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vx_pipe_t *pipe, int count)
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{
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snd_assert(chip->ops->dma_write, return);
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chip->ops->dma_write(chip, runtime, pipe, count);
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}
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static inline void vx_pseudo_dma_read(vx_core_t *chip, snd_pcm_runtime_t *runtime,
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vx_pipe_t *pipe, int count)
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{
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snd_assert(chip->ops->dma_read, return);
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chip->ops->dma_read(chip, runtime, pipe, count);
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}
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/* error with hardware code,
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* the return value is -(VX_ERR_MASK | actual-hw-error-code)
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*/
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#define VX_ERR_MASK 0x1000000
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#define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
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/*
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* pcm stuff
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*/
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int snd_vx_pcm_new(vx_core_t *chip);
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void vx_pcm_update_intr(vx_core_t *chip, unsigned int events);
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/*
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* mixer stuff
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*/
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int snd_vx_mixer_new(vx_core_t *chip);
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void vx_toggle_dac_mute(vx_core_t *chip, int mute);
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int vx_sync_audio_source(vx_core_t *chip);
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int vx_set_monitor_level(vx_core_t *chip, int audio, int level, int active);
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/*
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* IEC958 & clock stuff
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*/
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void vx_set_iec958_status(vx_core_t *chip, unsigned int bits);
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int vx_set_clock(vx_core_t *chip, unsigned int freq);
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void vx_set_internal_clock(vx_core_t *chip, unsigned int freq);
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int vx_change_frequency(vx_core_t *chip);
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/*
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* hardware constants
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*/
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#define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
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#define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
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/* audio input source */
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enum {
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VX_AUDIO_SRC_DIGITAL,
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VX_AUDIO_SRC_LINE,
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VX_AUDIO_SRC_MIC
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};
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/* clock source */
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enum {
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INTERNAL_QUARTZ,
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UER_SYNC
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};
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/* clock mode */
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enum {
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VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
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VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
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VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
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};
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/* SPDIF/UER type */
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enum {
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VX_UER_MODE_CONSUMER,
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VX_UER_MODE_PROFESSIONAL,
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VX_UER_MODE_NOT_PRESENT,
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};
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/* register indices */
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enum {
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VX_ICR,
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VX_CVR,
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VX_ISR,
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VX_IVR,
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VX_RXH,
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VX_TXH = VX_RXH,
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VX_RXM,
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VX_TXM = VX_RXM,
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VX_RXL,
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VX_TXL = VX_RXL,
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VX_DMA,
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VX_CDSP,
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VX_RFREQ,
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VX_RUER_V2,
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VX_GAIN,
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VX_DATA = VX_GAIN,
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VX_MEMIRQ,
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VX_ACQ,
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VX_BIT0,
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VX_BIT1,
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VX_MIC0,
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VX_MIC1,
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VX_MIC2,
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VX_MIC3,
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VX_PLX0,
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VX_PLX1,
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VX_PLX2,
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VX_LOFREQ, // V2: ACQ, VP: RFREQ
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VX_HIFREQ, // V2: BIT0, VP: RUER_V2
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VX_CSUER, // V2: BIT1, VP: BIT0
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VX_RUER, // V2: RUER_V2, VP: BIT1
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VX_REG_MAX,
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/* aliases for VX board */
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VX_RESET_DMA = VX_ISR,
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VX_CFG = VX_RFREQ,
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VX_STATUS = VX_MEMIRQ,
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VX_SELMIC = VX_MIC0,
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VX_COMPOT = VX_MIC1,
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VX_SCOMPR = VX_MIC2,
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VX_GLIMIT = VX_MIC3,
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VX_INTCSR = VX_PLX0,
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VX_CNTRL = VX_PLX1,
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VX_GPIOC = VX_PLX2,
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/* aliases for VXPOCKET board */
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VX_MICRO = VX_MEMIRQ,
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VX_CODEC2 = VX_MEMIRQ,
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VX_DIALOG = VX_ACQ,
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};
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/* RMH status type */
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enum {
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RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
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RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
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RMH_SSIZE_MASK = 2, /* status size given in bitmask */
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};
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/* bits for ICR register */
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#define ICR_HF1 0x10
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#define ICR_HF0 0x08
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#define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
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#define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
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/* bits for CVR register */
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#define CVR_HC 0x80
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/* bits for ISR register */
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#define ISR_HF3 0x10
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#define ISR_HF2 0x08
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#define ISR_CHK 0x10
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#define ISR_ERR 0x08
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#define ISR_TX_READY 0x04
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#define ISR_TX_EMPTY 0x02
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#define ISR_RX_FULL 0x01
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/* Constants used to access the DATA register */
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#define VX_DATA_CODEC_MASK 0x80
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#define VX_DATA_XICOR_MASK 0x80
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/* Constants used to access the CSUER register (both for VX2 and VXP) */
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#define VX_SUER_FREQ_MASK 0x0c
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#define VX_SUER_FREQ_32KHz_MASK 0x0c
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#define VX_SUER_FREQ_44KHz_MASK 0x00
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#define VX_SUER_FREQ_48KHz_MASK 0x04
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#define VX_SUER_DATA_PRESENT_MASK 0x02
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#define VX_SUER_CLOCK_PRESENT_MASK 0x01
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#define VX_CUER_HH_BITC_SEL_MASK 0x08
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#define VX_CUER_MH_BITC_SEL_MASK 0x04
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#define VX_CUER_ML_BITC_SEL_MASK 0x02
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#define VX_CUER_LL_BITC_SEL_MASK 0x01
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#define XX_UER_CBITS_OFFSET_MASK 0x1f
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/* bits for audio_info */
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#define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
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#define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
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#define VX_AUDIO_INFO_MPEG1 (1<<5)
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#define VX_AUDIO_INFO_MPEG2 (1<<6)
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#define VX_AUDIO_INFO_LINEAR_8 (1<<7)
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#define VX_AUDIO_INFO_LINEAR_16 (1<<8)
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#define VX_AUDIO_INFO_LINEAR_24 (1<<9)
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/* DSP Interrupt Request values */
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#define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
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/* call with vx_send_irq_dsp() */
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#define IRQ_MESS_WRITE_END 0x30
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#define IRQ_MESS_WRITE_NEXT 0x32
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#define IRQ_MESS_READ_NEXT 0x34
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#define IRQ_MESS_READ_END 0x36
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#define IRQ_MESSAGE 0x38
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#define IRQ_RESET_CHK 0x3A
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#define IRQ_CONNECT_STREAM_NEXT 0x26
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#define IRQ_CONNECT_STREAM_END 0x28
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#define IRQ_PAUSE_START_CONNECT 0x2A
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#define IRQ_END_CONNECTION 0x2C
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/* Is there async. events pending ( IT Source Test ) */
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#define ASYNC_EVENTS_PENDING 0x008000
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#define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
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#define NOTIF_EVENTS_PENDING 0x002000
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#define TIME_CODE_EVENT_PENDING 0x001000
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#define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
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#define END_OF_BUFFER_EVENTS_PENDING 0x000400
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#define FATAL_DSP_ERROR 0xff0000
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/* Stream Format Header Defines */
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#define HEADER_FMT_BASE 0xFED00000
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#define HEADER_FMT_MONO 0x000000C0
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#define HEADER_FMT_INTEL 0x00008000
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#define HEADER_FMT_16BITS 0x00002000
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#define HEADER_FMT_24BITS 0x00004000
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#define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
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#define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
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/* Constants used to access the Codec */
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#define XX_CODEC_SELECTOR 0x20
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/* codec commands */
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#define XX_CODEC_ADC_CONTROL_REGISTER 0x01
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#define XX_CODEC_DAC_CONTROL_REGISTER 0x02
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#define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
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#define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
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#define XX_CODEC_PORT_MODE_REGISTER 0x05
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#define XX_CODEC_STATUS_REPORT_REGISTER 0x06
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#define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
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/*
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* Audio-level control values
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*/
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#define CVAL_M110DB 0x000 /* -110dB */
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#define CVAL_M99DB 0x02C
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#define CVAL_M21DB 0x163
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#define CVAL_M18DB 0x16F
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#define CVAL_M10DB 0x18F
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#define CVAL_0DB 0x1B7
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#define CVAL_18DB 0x1FF /* +18dB */
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#define CVAL_MAX 0x1FF
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#define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
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#define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
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#define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
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#define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
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#define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
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#define VALID_AUDIO_IO_MUTE_LEVEL 0x04
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#define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
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#define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
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#endif /* __SOUND_VX_COMMON_H */
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