1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
202 lines
5.1 KiB
C
202 lines
5.1 KiB
C
/*
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* ccio-rm-dma.c:
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* DMA management routines for first generation cache-coherent machines.
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* "Real Mode" operation refers to U2/Uturn chip operation. The chip
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* can perform coherency checks w/o using the I/O MMU. That's all we
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* need until support for more than 4GB phys mem is needed.
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*
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* This is the trivial case - basically what x86 does.
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*
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* Drawbacks of using Real Mode are:
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* o outbound DMA is slower since one isn't using the prefetching
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* U2 can do for outbound DMA.
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* o Ability to do scatter/gather in HW is also lost.
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* o only known to work with PCX-W processor. (eg C360)
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* (PCX-U/U+ are not coherent with U2 in real mode.)
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*
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* Original version/author:
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* CVSROOT=:pserver:anonymous@198.186.203.37:/cvsroot/linux-parisc
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* cvs -z3 co linux/arch/parisc/kernel/dma-rm.c
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*
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* (C) Copyright 2000 Philipp Rumpf <prumpf@tux.org>
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*
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*
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* Adopted for The Puffin Group's parisc-linux port by Grant Grundler.
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* (C) Copyright 2000 Grant Grundler <grundler@puffin.external.hp.com>
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*
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/string.h>
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#include <linux/pci.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#include <asm/page.h>
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/* Only chose "ccio" since that's what HP-UX calls it....
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** Make it easier for folks to migrate from one to the other :^)
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*/
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#define MODULE_NAME "ccio"
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#define U2_IOA_RUNWAY 0x580
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#define U2_BC_GSC 0x501
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#define UTURN_IOA_RUNWAY 0x581
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#define UTURN_BC_GSC 0x502
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#define IS_U2(id) ( \
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(((id)->hw_type == HPHW_IOA) && ((id)->hversion == U2_IOA_RUNWAY)) || \
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(((id)->hw_type == HPHW_BCPORT) && ((id)->hversion == U2_BC_GSC)) \
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)
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#define IS_UTURN(id) ( \
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(((id)->hw_type == HPHW_IOA) && ((id)->hversion == UTURN_IOA_RUNWAY)) || \
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(((id)->hw_type == HPHW_BCPORT) && ((id)->hversion == UTURN_BC_GSC)) \
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)
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static int ccio_dma_supported( struct pci_dev *dev, u64 mask)
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{
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if (dev == NULL) {
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printk(KERN_ERR MODULE_NAME ": EISA/ISA/et al not supported\n");
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BUG();
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return(0);
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}
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/* only support 32-bit devices (ie PCI/GSC) */
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return((int) (mask >= 0xffffffffUL));
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}
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static void *ccio_alloc_consistent(struct pci_dev *dev, size_t size,
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dma_addr_t *handle)
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{
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void *ret;
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ret = (void *)__get_free_pages(GFP_ATOMIC, get_order(size));
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if (ret != NULL) {
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memset(ret, 0, size);
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*handle = virt_to_phys(ret);
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}
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return ret;
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}
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static void ccio_free_consistent(struct pci_dev *dev, size_t size,
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void *vaddr, dma_addr_t handle)
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{
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free_pages((unsigned long)vaddr, get_order(size));
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}
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static dma_addr_t ccio_map_single(struct pci_dev *dev, void *ptr, size_t size,
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int direction)
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{
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return virt_to_phys(ptr);
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}
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static void ccio_unmap_single(struct pci_dev *dev, dma_addr_t dma_addr,
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size_t size, int direction)
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{
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/* Nothing to do */
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}
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static int ccio_map_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, int direction)
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{
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int tmp = nents;
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/* KISS: map each buffer separately. */
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while (nents) {
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sg_dma_address(sglist) = ccio_map_single(dev, sglist->address, sglist->length, direction);
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sg_dma_len(sglist) = sglist->length;
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nents--;
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sglist++;
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}
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return tmp;
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}
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static void ccio_unmap_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, int direction)
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{
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#if 0
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while (nents) {
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ccio_unmap_single(dev, sg_dma_address(sglist), sg_dma_len(sglist), direction);
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nents--;
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sglist++;
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}
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return;
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#else
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/* Do nothing (copied from current ccio_unmap_single() :^) */
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#endif
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}
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static struct pci_dma_ops ccio_ops = {
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ccio_dma_supported,
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ccio_alloc_consistent,
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ccio_free_consistent,
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ccio_map_single,
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ccio_unmap_single,
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ccio_map_sg,
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ccio_unmap_sg,
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NULL, /* dma_sync_single_for_cpu : NOP for U2 */
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NULL, /* dma_sync_single_for_device : NOP for U2 */
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NULL, /* dma_sync_sg_for_cpu : ditto */
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NULL, /* dma_sync_sg_for_device : ditto */
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};
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/*
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** Determine if u2 should claim this chip (return 0) or not (return 1).
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** If so, initialize the chip and tell other partners in crime they
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** have work to do.
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*/
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static int
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ccio_probe(struct parisc_device *dev)
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{
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printk(KERN_INFO "%s found %s at 0x%lx\n", MODULE_NAME,
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dev->id.hversion == U2_BC_GSC ? "U2" : "UTurn",
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dev->hpa);
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/*
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** FIXME - should check U2 registers to verify it's really running
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** in "Real Mode".
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*/
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#if 0
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/* will need this for "Virtual Mode" operation */
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ccio_hw_init(ccio_dev);
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ccio_common_init(ccio_dev);
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#endif
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hppa_dma_ops = &ccio_ops;
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return 0;
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}
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static struct parisc_device_id ccio_tbl[] = {
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{ HPHW_BCPORT, HVERSION_REV_ANY_ID, U2_BC_GSC, 0xc },
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{ HPHW_BCPORT, HVERSION_REV_ANY_ID, UTURN_BC_GSC, 0xc },
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{ 0, }
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};
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static struct parisc_driver ccio_driver = {
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.name = "U2/Uturn",
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.id_table = ccio_tbl,
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.probe = ccio_probe,
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};
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void __init ccio_init(void)
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{
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register_parisc_driver(&ccio_driver);
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}
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