fd58e55fcf
Abstract portions of the MSI core for platforms that do not use standard APIC interrupt controllers. This is implemented through a new arch-specific msi setup routine, and a set of msi ops which can be set on a per platform basis. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
101 lines
2.3 KiB
C
101 lines
2.3 KiB
C
/*
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* MSI hooks for standard x86 apic
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*/
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include "msi.h"
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/*
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* Shifts for APIC-based data
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*/
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#define MSI_DATA_VECTOR_SHIFT 0
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#define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT)
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#define MSI_DATA_DELIVERY_SHIFT 8
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#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_SHIFT)
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#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_SHIFT)
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#define MSI_DATA_LEVEL_SHIFT 14
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#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
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#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
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#define MSI_DATA_TRIGGER_SHIFT 15
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#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
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#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
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/*
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* Shift/mask fields for APIC-based bus address
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*/
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#define MSI_ADDR_HEADER 0xfee00000
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#define MSI_ADDR_DESTID_MASK 0xfff0000f
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#define MSI_ADDR_DESTID_CPU(cpu) ((cpu) << MSI_TARGET_CPU_SHIFT)
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#define MSI_ADDR_DESTMODE_SHIFT 2
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#define MSI_ADDR_DESTMODE_PHYS (0 << MSI_ADDR_DESTMODE_SHIFT)
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#define MSI_ADDR_DESTMODE_LOGIC (1 << MSI_ADDR_DESTMODE_SHIFT)
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#define MSI_ADDR_REDIRECTION_SHIFT 3
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#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
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#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
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static void
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msi_target_apic(unsigned int vector,
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unsigned int dest_cpu,
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u32 *address_hi, /* in/out */
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u32 *address_lo) /* in/out */
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{
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u32 addr = *address_lo;
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addr &= MSI_ADDR_DESTID_MASK;
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addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(dest_cpu));
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*address_lo = addr;
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}
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static int
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msi_setup_apic(struct pci_dev *pdev, /* unused in generic */
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unsigned int vector,
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u32 *address_hi,
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u32 *address_lo,
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u32 *data)
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{
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unsigned long dest_phys_id;
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dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
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*address_hi = 0;
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*address_lo = MSI_ADDR_HEADER |
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MSI_ADDR_DESTMODE_PHYS |
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MSI_ADDR_REDIRECTION_CPU |
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MSI_ADDR_DESTID_CPU(dest_phys_id);
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*data = MSI_DATA_TRIGGER_EDGE |
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MSI_DATA_LEVEL_ASSERT |
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MSI_DATA_DELIVERY_FIXED |
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MSI_DATA_VECTOR(vector);
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return 0;
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}
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static void
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msi_teardown_apic(unsigned int vector)
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{
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return; /* no-op */
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}
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/*
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* Generic ops used on most IA archs/platforms. Set with msi_register()
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*/
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struct msi_ops msi_apic_ops = {
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.setup = msi_setup_apic,
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.teardown = msi_teardown_apic,
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.target = msi_target_apic,
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};
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