477 lines
12 KiB
C
477 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/zorro.h>
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#include <linux/module.h>
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#include <asm/page.h>
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#include <asm/amigaints.h>
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#include <asm/amigahw.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_eh.h>
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#include <scsi/scsi_tcq.h>
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#include "wd33c93.h"
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#include "gvp11.h"
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#define CHECK_WD33C93
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struct gvp11_hostdata {
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struct WD33C93_hostdata wh;
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struct gvp11_scsiregs *regs;
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struct device *dev;
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};
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#define DMA_DIR(d) ((d == DATA_OUT_DIR) ? DMA_TO_DEVICE : DMA_FROM_DEVICE)
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#define TO_DMA_MASK(m) (~((unsigned long long)m & 0xffffffff))
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static irqreturn_t gvp11_intr(int irq, void *data)
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{
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struct Scsi_Host *instance = data;
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struct gvp11_hostdata *hdata = shost_priv(instance);
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unsigned int status = hdata->regs->CNTR;
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unsigned long flags;
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if (!(status & GVP11_DMAC_INT_PENDING))
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return IRQ_NONE;
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spin_lock_irqsave(instance->host_lock, flags);
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wd33c93_intr(instance);
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spin_unlock_irqrestore(instance->host_lock, flags);
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return IRQ_HANDLED;
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}
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static int gvp11_xfer_mask = 0;
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static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
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{
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struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(cmd);
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unsigned long len = scsi_pointer->this_residual;
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struct Scsi_Host *instance = cmd->device->host;
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struct gvp11_hostdata *hdata = shost_priv(instance);
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struct WD33C93_hostdata *wh = &hdata->wh;
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struct gvp11_scsiregs *regs = hdata->regs;
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unsigned short cntr = GVP11_DMAC_INT_ENABLE;
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dma_addr_t addr;
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int bank_mask;
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static int scsi_alloc_out_of_range = 0;
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addr = dma_map_single(hdata->dev, scsi_pointer->ptr,
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len, DMA_DIR(dir_in));
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if (dma_mapping_error(hdata->dev, addr)) {
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dev_warn(hdata->dev, "cannot map SCSI data block %p\n",
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scsi_pointer->ptr);
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return 1;
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}
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scsi_pointer->dma_handle = addr;
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/* use bounce buffer if the physical address is bad */
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if (addr & wh->dma_xfer_mask) {
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/* drop useless mapping */
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dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
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scsi_pointer->this_residual,
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DMA_DIR(dir_in));
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scsi_pointer->dma_handle = (dma_addr_t) NULL;
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wh->dma_bounce_len = (scsi_pointer->this_residual + 511) & ~0x1ff;
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if (!scsi_alloc_out_of_range) {
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wh->dma_bounce_buffer =
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kmalloc(wh->dma_bounce_len, GFP_KERNEL);
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wh->dma_buffer_pool = BUF_SCSI_ALLOCED;
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}
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if (scsi_alloc_out_of_range ||
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!wh->dma_bounce_buffer) {
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wh->dma_bounce_buffer =
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amiga_chip_alloc(wh->dma_bounce_len,
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"GVP II SCSI Bounce Buffer");
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if (!wh->dma_bounce_buffer) {
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wh->dma_bounce_len = 0;
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return 1;
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}
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wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
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}
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if (!dir_in) {
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/* copy to bounce buffer for a write */
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memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,
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scsi_pointer->this_residual);
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}
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if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
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/* will flush/invalidate cache for us */
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addr = dma_map_single(hdata->dev,
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wh->dma_bounce_buffer,
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wh->dma_bounce_len,
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DMA_DIR(dir_in));
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/* can't map buffer; use PIO */
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if (dma_mapping_error(hdata->dev, addr)) {
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dev_warn(hdata->dev,
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"cannot map bounce buffer %p\n",
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wh->dma_bounce_buffer);
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return 1;
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}
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}
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if (addr & wh->dma_xfer_mask) {
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/* drop useless mapping */
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dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
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scsi_pointer->this_residual,
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DMA_DIR(dir_in));
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/* fall back to Chip RAM if address out of range */
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if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
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kfree(wh->dma_bounce_buffer);
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scsi_alloc_out_of_range = 1;
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} else {
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amiga_chip_free(wh->dma_bounce_buffer);
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}
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wh->dma_bounce_buffer =
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amiga_chip_alloc(wh->dma_bounce_len,
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"GVP II SCSI Bounce Buffer");
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if (!wh->dma_bounce_buffer) {
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wh->dma_bounce_len = 0;
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return 1;
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}
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if (!dir_in) {
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/* copy to bounce buffer for a write */
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memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,
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scsi_pointer->this_residual);
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}
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/* chip RAM can be mapped to phys. address directly */
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addr = virt_to_phys(wh->dma_bounce_buffer);
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/* no need to flush/invalidate cache */
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wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
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}
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/* finally, have OK mapping (punted for PIO else) */
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scsi_pointer->dma_handle = addr;
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}
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/* setup dma direction */
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if (!dir_in)
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cntr |= GVP11_DMAC_DIR_WRITE;
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wh->dma_dir = dir_in;
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regs->CNTR = cntr;
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/* setup DMA *physical* address */
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regs->ACR = addr;
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/* no more cache flush here - dma_map_single() takes care */
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bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0;
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if (bank_mask)
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regs->BANK = bank_mask & (addr >> 18);
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/* start DMA */
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regs->ST_DMA = 1;
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/* return success */
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return 0;
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}
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static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
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int status)
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{
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struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(SCpnt);
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struct gvp11_hostdata *hdata = shost_priv(instance);
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struct WD33C93_hostdata *wh = &hdata->wh;
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struct gvp11_scsiregs *regs = hdata->regs;
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/* stop DMA */
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regs->SP_DMA = 1;
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/* remove write bit from CONTROL bits */
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regs->CNTR = GVP11_DMAC_INT_ENABLE;
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if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
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dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
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scsi_pointer->this_residual,
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DMA_DIR(wh->dma_dir));
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/* copy from a bounce buffer, if necessary */
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if (status && wh->dma_bounce_buffer) {
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if (wh->dma_dir && SCpnt)
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memcpy(scsi_pointer->ptr, wh->dma_bounce_buffer,
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scsi_pointer->this_residual);
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if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
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kfree(wh->dma_bounce_buffer);
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else
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amiga_chip_free(wh->dma_bounce_buffer);
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wh->dma_bounce_buffer = NULL;
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wh->dma_bounce_len = 0;
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}
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}
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static const struct scsi_host_template gvp11_scsi_template = {
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.module = THIS_MODULE,
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.name = "GVP Series II SCSI",
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.show_info = wd33c93_show_info,
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.write_info = wd33c93_write_info,
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.proc_name = "GVP11",
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.queuecommand = wd33c93_queuecommand,
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.eh_abort_handler = wd33c93_abort,
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.eh_host_reset_handler = wd33c93_host_reset,
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.can_queue = CAN_QUEUE,
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.this_id = 7,
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.sg_tablesize = SG_ALL,
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.cmd_per_lun = CMD_PER_LUN,
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.dma_boundary = PAGE_SIZE - 1,
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.cmd_size = sizeof(struct scsi_pointer),
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};
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static int check_wd33c93(struct gvp11_scsiregs *regs)
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{
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#ifdef CHECK_WD33C93
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volatile unsigned char *sasr_3393, *scmd_3393;
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unsigned char save_sasr;
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unsigned char q, qq;
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/*
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* These darn GVP boards are a problem - it can be tough to tell
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* whether or not they include a SCSI controller. This is the
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* ultimate Yet-Another-GVP-Detection-Hack in that it actually
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* probes for a WD33c93 chip: If we find one, it's extremely
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* likely that this card supports SCSI, regardless of Product_
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* Code, Board_Size, etc.
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*/
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/* Get pointers to the presumed register locations and save contents */
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sasr_3393 = ®s->SASR;
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scmd_3393 = ®s->SCMD;
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save_sasr = *sasr_3393;
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/* First test the AuxStatus Reg */
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q = *sasr_3393; /* read it */
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if (q & 0x08) /* bit 3 should always be clear */
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return -ENODEV;
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*sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */
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if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
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*sasr_3393 = save_sasr; /* Oops - restore this byte */
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return -ENODEV;
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}
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if (*sasr_3393 != q) { /* should still read the same */
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*sasr_3393 = save_sasr; /* Oops - restore this byte */
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return -ENODEV;
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}
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if (*scmd_3393 != q) /* and so should the image at 0x1f */
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return -ENODEV;
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/*
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* Ok, we probably have a wd33c93, but let's check a few other places
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* for good measure. Make sure that this works for both 'A and 'B
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* chip versions.
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*/
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*sasr_3393 = WD_SCSI_STATUS;
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q = *scmd_3393;
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*sasr_3393 = WD_SCSI_STATUS;
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*scmd_3393 = ~q;
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*sasr_3393 = WD_SCSI_STATUS;
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qq = *scmd_3393;
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*sasr_3393 = WD_SCSI_STATUS;
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*scmd_3393 = q;
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if (qq != q) /* should be read only */
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return -ENODEV;
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*sasr_3393 = 0x1e; /* this register is unimplemented */
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q = *scmd_3393;
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*sasr_3393 = 0x1e;
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*scmd_3393 = ~q;
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*sasr_3393 = 0x1e;
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qq = *scmd_3393;
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*sasr_3393 = 0x1e;
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*scmd_3393 = q;
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if (qq != q || qq != 0xff) /* should be read only, all 1's */
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return -ENODEV;
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*sasr_3393 = WD_TIMEOUT_PERIOD;
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q = *scmd_3393;
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*sasr_3393 = WD_TIMEOUT_PERIOD;
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*scmd_3393 = ~q;
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*sasr_3393 = WD_TIMEOUT_PERIOD;
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qq = *scmd_3393;
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*sasr_3393 = WD_TIMEOUT_PERIOD;
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*scmd_3393 = q;
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if (qq != (~q & 0xff)) /* should be read/write */
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return -ENODEV;
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#endif /* CHECK_WD33C93 */
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return 0;
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}
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static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent)
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{
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struct Scsi_Host *instance;
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unsigned long address;
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int error;
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unsigned int epc;
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unsigned int default_dma_xfer_mask;
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struct gvp11_hostdata *hdata;
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struct gvp11_scsiregs *regs;
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wd33c93_regs wdregs;
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default_dma_xfer_mask = ent->driver_data;
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if (dma_set_mask_and_coherent(&z->dev,
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TO_DMA_MASK(default_dma_xfer_mask))) {
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dev_warn(&z->dev, "cannot use DMA mask %llx\n",
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TO_DMA_MASK(default_dma_xfer_mask));
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return -ENODEV;
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}
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/*
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* Rumors state that some GVP ram boards use the same product
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* code as the SCSI controllers. Therefore if the board-size
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* is not 64KB we assume it is a ram board and bail out.
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*/
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if (zorro_resource_len(z) != 0x10000)
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return -ENODEV;
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address = z->resource.start;
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if (!request_mem_region(address, 256, "wd33c93"))
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return -EBUSY;
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regs = ZTWO_VADDR(address);
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error = check_wd33c93(regs);
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if (error)
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goto fail_check_or_alloc;
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instance = scsi_host_alloc(&gvp11_scsi_template,
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sizeof(struct gvp11_hostdata));
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if (!instance) {
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error = -ENOMEM;
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goto fail_check_or_alloc;
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}
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instance->irq = IRQ_AMIGA_PORTS;
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instance->unique_id = z->slotaddr;
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regs->secret2 = 1;
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regs->secret1 = 0;
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regs->secret3 = 15;
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while (regs->CNTR & GVP11_DMAC_BUSY)
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;
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regs->CNTR = 0;
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regs->BANK = 0;
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wdregs.SASR = ®s->SASR;
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wdregs.SCMD = ®s->SCMD;
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hdata = shost_priv(instance);
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if (gvp11_xfer_mask) {
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hdata->wh.dma_xfer_mask = gvp11_xfer_mask;
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if (dma_set_mask_and_coherent(&z->dev,
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TO_DMA_MASK(gvp11_xfer_mask))) {
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dev_warn(&z->dev, "cannot use DMA mask %llx\n",
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TO_DMA_MASK(gvp11_xfer_mask));
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error = -ENODEV;
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goto fail_check_or_alloc;
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}
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} else
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hdata->wh.dma_xfer_mask = default_dma_xfer_mask;
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hdata->wh.no_sync = 0xff;
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hdata->wh.fast = 0;
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hdata->wh.dma_mode = CTRL_DMA;
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hdata->regs = regs;
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/*
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* Check for 14MHz SCSI clock
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*/
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epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
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wd33c93_init(instance, wdregs, dma_setup, dma_stop,
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(epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
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: WD33C93_FS_12_15);
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error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
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"GVP11 SCSI", instance);
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if (error)
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goto fail_irq;
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regs->CNTR = GVP11_DMAC_INT_ENABLE;
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error = scsi_add_host(instance, NULL);
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if (error)
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goto fail_host;
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zorro_set_drvdata(z, instance);
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scsi_scan_host(instance);
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return 0;
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fail_host:
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free_irq(IRQ_AMIGA_PORTS, instance);
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fail_irq:
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scsi_host_put(instance);
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fail_check_or_alloc:
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release_mem_region(address, 256);
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return error;
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}
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static void gvp11_remove(struct zorro_dev *z)
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{
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struct Scsi_Host *instance = zorro_get_drvdata(z);
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struct gvp11_hostdata *hdata = shost_priv(instance);
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hdata->regs->CNTR = 0;
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scsi_remove_host(instance);
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free_irq(IRQ_AMIGA_PORTS, instance);
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scsi_host_put(instance);
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release_mem_region(z->resource.start, 256);
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}
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/*
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* This should (hopefully) be the correct way to identify
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* all the different GVP SCSI controllers (except for the
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* SERIES I though).
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*/
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static struct zorro_device_id gvp11_zorro_tbl[] = {
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{ ZORRO_PROD_GVP_COMBO_030_R3_SCSI, ~0x00ffffff },
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{ ZORRO_PROD_GVP_SERIES_II, ~0x00ffffff },
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{ ZORRO_PROD_GVP_GFORCE_030_SCSI, ~0x01ffffff },
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{ ZORRO_PROD_GVP_A530_SCSI, ~0x01ffffff },
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{ ZORRO_PROD_GVP_COMBO_030_R4_SCSI, ~0x01ffffff },
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{ ZORRO_PROD_GVP_A1291, ~0x07ffffff },
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{ ZORRO_PROD_GVP_GFORCE_040_SCSI_1, ~0x07ffffff },
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{ 0 }
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};
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MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl);
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static struct zorro_driver gvp11_driver = {
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.name = "gvp11",
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.id_table = gvp11_zorro_tbl,
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.probe = gvp11_probe,
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.remove = gvp11_remove,
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};
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static int __init gvp11_init(void)
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{
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return zorro_register_driver(&gvp11_driver);
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}
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module_init(gvp11_init);
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static void __exit gvp11_exit(void)
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{
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zorro_unregister_driver(&gvp11_driver);
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}
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module_exit(gvp11_exit);
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MODULE_DESCRIPTION("GVP Series II SCSI");
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MODULE_LICENSE("GPL");
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