255 lines
6.0 KiB
C
255 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* PCI Express Precision Time Measurement
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* Copyright (c) 2016, Intel Corporation.
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*/
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#include <linux/bitfield.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include "../pci.h"
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/*
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* If the next upstream device supports PTM, return it; otherwise return
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* NULL. PTM Messages are local, so both link partners must support it.
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*/
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static struct pci_dev *pci_upstream_ptm(struct pci_dev *dev)
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{
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struct pci_dev *ups = pci_upstream_bridge(dev);
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/*
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* Switch Downstream Ports are not permitted to have a PTM
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* capability; their PTM behavior is controlled by the Upstream
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* Port (PCIe r5.0, sec 7.9.16), so if the upstream bridge is a
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* Switch Downstream Port, look up one more level.
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*/
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if (ups && pci_pcie_type(ups) == PCI_EXP_TYPE_DOWNSTREAM)
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ups = pci_upstream_bridge(ups);
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if (ups && ups->ptm_cap)
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return ups;
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return NULL;
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}
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/*
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* Find the PTM Capability (if present) and extract the information we need
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* to use it.
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*/
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void pci_ptm_init(struct pci_dev *dev)
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{
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u16 ptm;
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u32 cap;
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struct pci_dev *ups;
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if (!pci_is_pcie(dev))
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return;
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ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
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if (!ptm)
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return;
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dev->ptm_cap = ptm;
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pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_PTM, sizeof(u32));
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pci_read_config_dword(dev, ptm + PCI_PTM_CAP, &cap);
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dev->ptm_granularity = FIELD_GET(PCI_PTM_GRANULARITY_MASK, cap);
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/*
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* Per the spec recommendation (PCIe r6.0, sec 7.9.15.3), select the
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* furthest upstream Time Source as the PTM Root. For Endpoints,
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* "the Effective Granularity is the maximum Local Clock Granularity
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* reported by the PTM Root and all intervening PTM Time Sources."
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*/
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ups = pci_upstream_ptm(dev);
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if (ups) {
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if (ups->ptm_granularity == 0)
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dev->ptm_granularity = 0;
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else if (ups->ptm_granularity > dev->ptm_granularity)
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dev->ptm_granularity = ups->ptm_granularity;
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} else if (cap & PCI_PTM_CAP_ROOT) {
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dev->ptm_root = 1;
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} else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
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/*
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* Per sec 7.9.15.3, this should be the Local Clock
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* Granularity of the associated Time Source. But it
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* doesn't say how to find that Time Source.
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*/
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dev->ptm_granularity = 0;
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}
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
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pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM)
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pci_enable_ptm(dev, NULL);
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}
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void pci_save_ptm_state(struct pci_dev *dev)
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{
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u16 ptm = dev->ptm_cap;
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struct pci_cap_saved_state *save_state;
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u32 *cap;
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if (!ptm)
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return;
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save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
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if (!save_state)
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return;
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cap = (u32 *)&save_state->cap.data[0];
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pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, cap);
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}
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void pci_restore_ptm_state(struct pci_dev *dev)
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{
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u16 ptm = dev->ptm_cap;
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struct pci_cap_saved_state *save_state;
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u32 *cap;
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if (!ptm)
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return;
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save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
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if (!save_state)
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return;
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cap = (u32 *)&save_state->cap.data[0];
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pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, *cap);
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}
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/* Enable PTM in the Control register if possible */
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static int __pci_enable_ptm(struct pci_dev *dev)
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{
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u16 ptm = dev->ptm_cap;
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struct pci_dev *ups;
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u32 ctrl;
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if (!ptm)
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return -EINVAL;
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/*
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* A device uses local PTM Messages to request time information
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* from a PTM Root that's farther upstream. Every device along the
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* path must support PTM and have it enabled so it can handle the
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* messages. Therefore, if this device is not a PTM Root, the
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* upstream link partner must have PTM enabled before we can enable
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* PTM.
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*/
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if (!dev->ptm_root) {
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ups = pci_upstream_ptm(dev);
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if (!ups || !ups->ptm_enabled)
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return -EINVAL;
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}
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pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
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ctrl |= PCI_PTM_CTRL_ENABLE;
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ctrl &= ~PCI_PTM_GRANULARITY_MASK;
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ctrl |= FIELD_PREP(PCI_PTM_GRANULARITY_MASK, dev->ptm_granularity);
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if (dev->ptm_root)
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ctrl |= PCI_PTM_CTRL_ROOT;
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pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
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return 0;
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}
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/**
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* pci_enable_ptm() - Enable Precision Time Measurement
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* @dev: PCI device
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* @granularity: pointer to return granularity
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*
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* Enable Precision Time Measurement for @dev. If successful and
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* @granularity is non-NULL, return the Effective Granularity.
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*
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* Return: zero if successful, or -EINVAL if @dev lacks a PTM Capability or
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* is not a PTM Root and lacks an upstream path of PTM-enabled devices.
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*/
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int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
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{
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int rc;
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char clock_desc[8];
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rc = __pci_enable_ptm(dev);
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if (rc)
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return rc;
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dev->ptm_enabled = 1;
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if (granularity)
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*granularity = dev->ptm_granularity;
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switch (dev->ptm_granularity) {
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case 0:
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snprintf(clock_desc, sizeof(clock_desc), "unknown");
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break;
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case 255:
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snprintf(clock_desc, sizeof(clock_desc), ">254ns");
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break;
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default:
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snprintf(clock_desc, sizeof(clock_desc), "%uns",
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dev->ptm_granularity);
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break;
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}
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pci_info(dev, "PTM enabled%s, %s granularity\n",
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dev->ptm_root ? " (root)" : "", clock_desc);
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return 0;
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}
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EXPORT_SYMBOL(pci_enable_ptm);
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static void __pci_disable_ptm(struct pci_dev *dev)
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{
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u16 ptm = dev->ptm_cap;
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u32 ctrl;
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if (!ptm)
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return;
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pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
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ctrl &= ~(PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT);
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pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
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}
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/**
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* pci_disable_ptm() - Disable Precision Time Measurement
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* @dev: PCI device
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*
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* Disable Precision Time Measurement for @dev.
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*/
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void pci_disable_ptm(struct pci_dev *dev)
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{
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if (dev->ptm_enabled) {
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__pci_disable_ptm(dev);
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dev->ptm_enabled = 0;
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}
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}
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EXPORT_SYMBOL(pci_disable_ptm);
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/*
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* Disable PTM, but preserve dev->ptm_enabled so we silently re-enable it on
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* resume if necessary.
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*/
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void pci_suspend_ptm(struct pci_dev *dev)
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{
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if (dev->ptm_enabled)
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__pci_disable_ptm(dev);
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}
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/* If PTM was enabled before suspend, re-enable it when resuming */
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void pci_resume_ptm(struct pci_dev *dev)
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{
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if (dev->ptm_enabled)
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__pci_enable_ptm(dev);
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}
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bool pcie_ptm_enabled(struct pci_dev *dev)
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{
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if (!dev)
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return false;
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return dev->ptm_enabled;
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}
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EXPORT_SYMBOL(pcie_ptm_enabled);
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