mfd: intel-m10-bmc: Create m10bmc_sys_update_bits()
Wrap regmap_update_bits() with m10bmc_sys_update_bits() in order to be able to add additional checks into it. Co-developed-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230417092653.16487-3-ilpo.jarvinen@linux.intel.com
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@ -376,12 +376,11 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)
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u32 doorbell_reg, progress, status;
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int ret, err;
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ret = regmap_update_bits(sec->m10bmc->regmap,
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csr_map->base + csr_map->doorbell,
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DRBL_RSU_REQUEST | DRBL_HOST_STATUS,
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DRBL_RSU_REQUEST |
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FIELD_PREP(DRBL_HOST_STATUS,
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HOST_STATUS_IDLE));
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ret = m10bmc_sys_update_bits(sec->m10bmc, csr_map->doorbell,
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DRBL_RSU_REQUEST | DRBL_HOST_STATUS,
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DRBL_RSU_REQUEST |
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FIELD_PREP(DRBL_HOST_STATUS,
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HOST_STATUS_IDLE));
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if (ret)
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return FW_UPLOAD_ERR_RW_ERROR;
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@ -450,11 +449,10 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec)
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u32 doorbell_reg, status;
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int ret;
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ret = regmap_update_bits(sec->m10bmc->regmap,
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csr_map->base + csr_map->doorbell,
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DRBL_HOST_STATUS,
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FIELD_PREP(DRBL_HOST_STATUS,
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HOST_STATUS_WRITE_DONE));
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ret = m10bmc_sys_update_bits(sec->m10bmc, csr_map->doorbell,
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DRBL_HOST_STATUS,
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FIELD_PREP(DRBL_HOST_STATUS,
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HOST_STATUS_WRITE_DONE));
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if (ret)
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return FW_UPLOAD_ERR_RW_ERROR;
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@ -517,11 +515,10 @@ static enum fw_upload_err rsu_cancel(struct m10bmc_sec *sec)
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if (rsu_prog(doorbell) != RSU_PROG_READY)
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return FW_UPLOAD_ERR_BUSY;
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ret = regmap_update_bits(sec->m10bmc->regmap,
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csr_map->base + csr_map->doorbell,
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DRBL_HOST_STATUS,
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FIELD_PREP(DRBL_HOST_STATUS,
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HOST_STATUS_ABORT_RSU));
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ret = m10bmc_sys_update_bits(sec->m10bmc, csr_map->doorbell,
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DRBL_HOST_STATUS,
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FIELD_PREP(DRBL_HOST_STATUS,
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HOST_STATUS_ABORT_RSU));
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if (ret)
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return FW_UPLOAD_ERR_RW_ERROR;
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@ -764,3 +761,4 @@ module_platform_driver(intel_m10bmc_sec_driver);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("Intel MAX10 BMC Secure Update");
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS(INTEL_M10_BMC_CORE);
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@ -12,6 +12,15 @@
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#include <linux/mfd/intel-m10-bmc.h>
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#include <linux/module.h>
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int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset,
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unsigned int msk, unsigned int val)
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{
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const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map;
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return regmap_update_bits(m10bmc->regmap, csr_map->base + offset, msk, val);
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}
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EXPORT_SYMBOL_NS_GPL(m10bmc_sys_update_bits, INTEL_M10_BMC_CORE);
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static ssize_t bmc_version_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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@ -251,6 +251,7 @@ struct intel_m10bmc {
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*
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* m10bmc_raw_read - read m10bmc register per addr
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* m10bmc_sys_read - read m10bmc system register per offset
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* m10bmc_sys_update_bits - update m10bmc system register per offset
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*/
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static inline int
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m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
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@ -282,6 +283,9 @@ static inline int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offs
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return m10bmc_raw_read(m10bmc, csr_map->base + offset, val);
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}
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int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset,
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unsigned int msk, unsigned int val);
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/*
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* MAX10 BMC Core support
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*/
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