From 9f8bbb531a17c5afcc3a02d92f64194819178254 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 28 Nov 2023 16:10:08 -0600 Subject: [PATCH 01/56] dt-bindings: Turn on undocumented compatible checks The undocumented compatibles in the examples are down to just a few left. Turn on the warning by default. The increased visibility should get the remaining warnings fixed. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20231128221008.4050638-2-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/Makefile | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 2323fd5b7cda..7653ac50e3b1 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -61,9 +61,6 @@ override DTC_FLAGS := \ -Wno-unique_unit_address \ -Wunique_unit_address_if_enabled -# Disable undocumented compatible checks until warning free -override DT_CHECKER_FLAGS ?= - $(obj)/processed-schema.json: $(DT_DOCS) $(src)/.yamllint check_dtschema_version FORCE $(call if_changed_rule,chkdt) From ed3648d264c7f95c7ae0a13d98da0da2018a5bbd Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 8 Jan 2024 09:37:49 +0100 Subject: [PATCH 02/56] docs: dt: submitting-patches: drop outdated points to TXT format New bindings in TXT format are not accepted and DT schema format expects all compatibles to be explicitly defined, thus guidance about "wildcard " is not correct anymore. Drop that paragraph and update one more place which still mentions TXT files. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240108083750.16350-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../devicetree/bindings/submitting-patches.rst | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index 36a17b250ccc..b460ebffee42 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -42,28 +42,18 @@ I. For patch submitters the code implementing the binding. 6) Any compatible strings used in a chip or board DTS file must be - previously documented in the corresponding DT binding text file + previously documented in the corresponding DT binding file in Documentation/devicetree/bindings. This rule applies even if the Linux device driver does not yet match on the compatible string. [ checkpatch will emit warnings if this step is not followed as of commit bff5da4335256513497cc8c79f9a9d1665e09864 ("checkpatch: add DT compatible string documentation checks"). ] - 7) The wildcard "" may be used in compatible strings, as in - the following example: - - - compatible: Must contain '"nvidia,-pcie", - "nvidia,tegra20-pcie"' where is tegra30, tegra132, ... - - As in the above example, the known values of "" should be - documented if it is used. - - 8) If a documented compatible string is not yet matched by the + 7) If a documented compatible string is not yet matched by the driver, the documentation should also include a compatible - string that is matched by the driver (as in the "nvidia,tegra20-pcie" - example above). + string that is matched by the driver. - 9) Bindings are actively used by multiple projects other than the Linux + 8) Bindings are actively used by multiple projects other than the Linux Kernel, extra care and consideration may need to be taken when making changes to existing bindings. From 9c08be64059e562b2ddcfe884ab35610117e6371 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 8 Jan 2024 09:37:50 +0100 Subject: [PATCH 03/56] docs: dt: submitting-patches: add commit subject prefix in reversed format ASoC, media, regulators and SPI subsystems prefer commits starting with subsystem name (e.g. "spi: dt-bindings:"), so document this to avoid confusing contributors. Cc: Mark Brown Cc: Mauro Carvalho Chehab Signed-off-by: Krzysztof Kozlowski Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20240108083750.16350-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/submitting-patches.rst | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/submitting-patches.rst b/Documentation/devicetree/bindings/submitting-patches.rst index b460ebffee42..a64f21a5f299 100644 --- a/Documentation/devicetree/bindings/submitting-patches.rst +++ b/Documentation/devicetree/bindings/submitting-patches.rst @@ -15,6 +15,11 @@ I. For patch submitters "dt-bindings: : ..." + Few subsystems, like ASoC, media, regulators and SPI, expect reverse order + of the prefixes:: + + ": dt-bindings: ..." + The 80 characters of the subject are precious. It is recommended to not use "Documentation" or "doc" because that is implied. All bindings are docs. Repeating "binding" again should also be avoided. From 3b8435db840cde070fa78a777fa20b098b9abc87 Mon Sep 17 00:00:00 2001 From: Ninad Palsule Date: Tue, 16 Jan 2024 12:37:33 -0600 Subject: [PATCH 04/56] dt-bindings: Add DPS310 as trivial device Infineon DPS310 is a barometric pressure and temperature sensor. Acked-by: Krzysztof Kozlowski Signed-off-by: Ninad Palsule Link: https://lore.kernel.org/r/20240116183734.3944028-3-ninad@linux.ibm.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 79dcd92c4a43..5b52950e6bfc 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -137,6 +137,8 @@ properties: - ibm,cffps1 # IBM Common Form Factor Power Supply Versions 2 - ibm,cffps2 + # Infineon barometric pressure and temperature sensor + - infineon,dps310 # Infineon IR36021 digital POL buck controller - infineon,ir36021 # Infineon IR38060 Voltage Regulator From e20cd62b1f1708a4dec7ff4beb9e748a0bdb5716 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Wed, 17 Jan 2024 09:32:06 +0100 Subject: [PATCH 05/56] of: property: Make 'no port node found' output a debug message There are cases where an unavailable port is not an error, making this error message a false-positive. Since commit d56de8c9a17d8 ("usb: typec: tcpm: try to get role switch from tcpc fwnode") the role switch is tried on the port dev first and tcpc fwnode afterwards. If using the latter bindings getting from port dev fails every time. The kernel log is flooded with the messages like: OF: graph: no port node found in /soc@0/bus@42000000/i2c@42530000/usb-typec@50 Silence this message by making it a debug message. Signed-off-by: Alexander Stein Link: https://lore.kernel.org/r/20240117083206.2901534-1-alexander.stein@ew.tq-group.com Signed-off-by: Rob Herring --- drivers/of/property.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/property.c b/drivers/of/property.c index 641a40cf5cf3..a02a985c13ba 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -665,7 +665,7 @@ struct device_node *of_graph_get_next_endpoint(const struct device_node *parent, of_node_put(node); if (!port) { - pr_err("graph: no port node found in %pOF\n", parent); + pr_debug("graph: no port node found in %pOF\n", parent); return NULL; } } else { From 517fd647359a0c635314cd23082e46b402f2f046 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Tue, 23 Jan 2024 07:08:04 +0100 Subject: [PATCH 06/56] dt-bindings: interrupt-controller: convert MediaTek sysirq to the json-schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This helps validating DTS files. Signed-off-by: Rafał Miłecki Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240123060804.32254-1-zajec5@gmail.com Signed-off-by: Rob Herring --- .../mediatek,mt6577-sysirq.yaml | 85 +++++++++++++++++++ .../interrupt-controller/mediatek,sysirq.txt | 44 ---------- 2 files changed, 85 insertions(+), 44 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml new file mode 100644 index 000000000000..e1a379c052e4 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mt6577-sysirq.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/mediatek,mt6577-sysirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek sysirq + +description: + MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI + interrupt. + +maintainers: + - Matthias Brugger + +properties: + compatible: + oneOf: + - const: mediatek,mt6577-sysirq + - items: + - enum: + - mediatek,mt2701-sysirq + - mediatek,mt2712-sysirq + - mediatek,mt6580-sysirq + - mediatek,mt6582-sysirq + - mediatek,mt6589-sysirq + - mediatek,mt6592-sysirq + - mediatek,mt6755-sysirq + - mediatek,mt6765-sysirq + - mediatek,mt6779-sysirq + - mediatek,mt6795-sysirq + - mediatek,mt6797-sysirq + - mediatek,mt7622-sysirq + - mediatek,mt7623-sysirq + - mediatek,mt7629-sysirq + - mediatek,mt8127-sysirq + - mediatek,mt8135-sysirq + - mediatek,mt8173-sysirq + - mediatek,mt8183-sysirq + - mediatek,mt8365-sysirq + - mediatek,mt8516-sysirq + - const: mediatek,mt6577-sysirq + + reg: + minItems: 1 + maxItems: 2 + + interrupt-controller: true + + "#interrupt-cells": + $ref: "arm,gic.yaml#/properties/#interrupt-cells" + +required: + - reg + - interrupt-controller + - "#interrupt-cells" + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + - if: + properties: + compatible: + contains: + const: mediatek,mt6797-sysirq + then: + properties: + reg: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + +unevaluatedProperties: false + +examples: + - | + interrupt-controller@10200620 { + compatible = "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq"; + reg = <0x10220620 0x20>, + <0x10220690 0x10>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt deleted file mode 100644 index 3ffc60184e44..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ /dev/null @@ -1,44 +0,0 @@ -MediaTek sysirq - -MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI -interrupt. - -Required properties: -- compatible: should be - "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516 - "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 - "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 - "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 - "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 - "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 - "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623 - "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629 - "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795 - "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797 - "mediatek,mt6779-sysirq", "mediatek,mt6577-sysirq": for MT6779 - "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765 - "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755 - "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592 - "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589 - "mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582 - "mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580 - "mediatek,mt6577-sysirq": for MT6577 - "mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712 - "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 - "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq": for MT8365 -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. -- reg: Physical base address of the intpol registers and length of memory - mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others - need 1. - -Example: - sysirq: intpol-controller@10200620 { - compatible = "mediatek,mt6797-sysirq", - "mediatek,mt6577-sysirq"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0 0x10220620 0 0x20>, - <0 0x10220690 0 0x10>; - }; From d5b8fbee1e7264143c38740ebcdabb88475e0590 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 22 Jan 2024 15:15:00 -0600 Subject: [PATCH 07/56] MAINTAINERS: Drop Frank Rowand from DT maintainership Frank retired a while back and surprisingly has found better things to do than DT maintainership. Thank you Frank for all of your help with DT for many years. Link: https://lore.kernel.org/r/20240122211501.1719374-1-robh@kernel.org Signed-off-by: Rob Herring --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8d1052fa6a69..eda745c0f92a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16359,7 +16359,6 @@ F: drivers/infiniband/ulp/opa_vnic OPEN FIRMWARE AND FLATTENED DEVICE TREE M: Rob Herring -M: Frank Rowand L: devicetree@vger.kernel.org S: Maintained W: http://www.devicetree.org/ From 442fd190d3471afdfd9ac8e067bc5e2aff88213c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 22 Jan 2024 15:15:26 -0600 Subject: [PATCH 08/56] MAINTAINERS: Drop my "+dt" sub-address I never really implemented any filtering on the "+dt" sub-address, so drop it. Acked-by: Wolfram Sang # for I2C Link: https://lore.kernel.org/r/20240122211528.1719994-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml | 2 +- Documentation/devicetree/bindings/i2c/i2c-pxa.yaml | 2 +- Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml | 2 +- Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml | 2 +- MAINTAINERS | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml b/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml index 9cf6137dd524..65155bb701a9 100644 --- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml @@ -9,7 +9,7 @@ title: Marvell PXA GPIO controller maintainers: - Linus Walleij - Bartosz Golaszewski - - Rob Herring + - Rob Herring allOf: - if: diff --git a/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml b/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml index 31386a8d7684..e89ee361741e 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Marvell MMP I2C controller maintainers: - - Rob Herring + - Rob Herring allOf: - $ref: /schemas/i2c/i2c-controller.yaml# diff --git a/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml b/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml index a16c355dcd11..fcf52d2cac9e 100644 --- a/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml @@ -12,7 +12,7 @@ allOf: maintainers: - Alessandro Zummo - Alexandre Belloni - - Rob Herring + - Rob Herring properties: compatible: diff --git a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml b/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml index 1ee4aab695d3..fe6bc4173789 100644 --- a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml +++ b/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml @@ -9,7 +9,7 @@ title: Marvell MMP Timer maintainers: - Daniel Lezcano - Thomas Gleixner - - Rob Herring + - Rob Herring properties: $nodename: diff --git a/MAINTAINERS b/MAINTAINERS index eda745c0f92a..42b43337c266 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16358,7 +16358,7 @@ S: Supported F: drivers/infiniband/ulp/opa_vnic OPEN FIRMWARE AND FLATTENED DEVICE TREE -M: Rob Herring +M: Rob Herring L: devicetree@vger.kernel.org S: Maintained W: http://www.devicetree.org/ @@ -16374,7 +16374,7 @@ K: of_overlay_fdt_apply K: of_overlay_remove OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS -M: Rob Herring +M: Rob Herring M: Krzysztof Kozlowski M: Conor Dooley L: devicetree@vger.kernel.org From 85f838adad5487f96ff3acf6d3eb8263a39a0757 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 29 Jan 2024 13:18:53 +0100 Subject: [PATCH 09/56] dt-bindings: fpga: Convert fpga-region binding to yaml Convert the generic fpga region DT binding to json-schema. There are some differences compare to txt version. 1. DT overlay can't be described in example that's why directly include information from overlay to node which was referenced. It is visible in example with /* DT Overlay contains: &... */ 2. All example have been rewritten to be simpler and describe only full reconfiguration and partial reconfiguration with one bridge. Completely drop the case where fpga region can inside partial reconfiguration region which is already described in description 3. Fixed some typos in descriptions compare to txt version but most of it is just c&p from txt file. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530726.git.michal.simek@amd.com Signed-off-by: Rob Herring --- .../devicetree/bindings/fpga/fpga-region.txt | 479 ------------------ .../devicetree/bindings/fpga/fpga-region.yaml | 358 +++++++++++++ 2 files changed, 358 insertions(+), 479 deletions(-) delete mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.txt create mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.yaml diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt deleted file mode 100644 index 528df8a0e6d8..000000000000 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ /dev/null @@ -1,479 +0,0 @@ -FPGA Region Device Tree Binding - -Alan Tull 2016 - - CONTENTS - - Introduction - - Terminology - - Sequence - - FPGA Region - - Supported Use Models - - Device Tree Examples - - Constraints - - -Introduction -============ - -FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in -the Device Tree. FPGA Regions provide a way to program FPGAs under device tree -control. - -This device tree binding document hits some of the high points of FPGA usage and -attempts to include terminology used by both major FPGA manufacturers. This -document isn't a replacement for any manufacturers specifications for FPGA -usage. - - -Terminology -=========== - -Full Reconfiguration - * The entire FPGA is programmed. - -Partial Reconfiguration (PR) - * A section of an FPGA is reprogrammed while the rest of the FPGA is not - affected. - * Not all FPGA's support PR. - -Partial Reconfiguration Region (PRR) - * Also called a "reconfigurable partition" - * A PRR is a specific section of an FPGA reserved for reconfiguration. - * A base (or static) FPGA image may create a set of PRR's that later may - be independently reprogrammed many times. - * The size and specific location of each PRR is fixed. - * The connections at the edge of each PRR are fixed. The image that is loaded - into a PRR must fit and must use a subset of the region's connections. - * The busses within the FPGA are split such that each region gets its own - branch that may be gated independently. - -Persona - * Also called a "partial bit stream" - * An FPGA image that is designed to be loaded into a PRR. There may be - any number of personas designed to fit into a PRR, but only one at at time - may be loaded. - * A persona may create more regions. - -FPGA Bridge - * FPGA Bridges gate bus signals between a host and FPGA. - * FPGA Bridges should be disabled while the FPGA is being programmed to - prevent spurious signals on the cpu bus and to the soft logic. - * FPGA bridges may be actual hardware or soft logic on an FPGA. - * During Full Reconfiguration, hardware bridges between the host and FPGA - will be disabled. - * During Partial Reconfiguration of a specific region, that region's bridge - will be used to gate the busses. Traffic to other regions is not affected. - * In some implementations, the FPGA Manager transparently handles gating the - buses, eliminating the need to show the hardware FPGA bridges in the - device tree. - * An FPGA image may create a set of reprogrammable regions, each having its - own bridge and its own split of the busses in the FPGA. - -FPGA Manager - * An FPGA Manager is a hardware block that programs an FPGA under the control - of a host processor. - -Base Image - * Also called the "static image" - * An FPGA image that is designed to do full reconfiguration of the FPGA. - * A base image may set up a set of partial reconfiguration regions that may - later be reprogrammed. - - ---------------- ---------------------------------- - | Host CPU | | FPGA | - | | | | - | ----| | ----------- -------- | - | | H | | |==>| Bridge0 |<==>| PRR0 | | - | | W | | | ----------- -------- | - | | | | | | - | | B |<=====>|<==| ----------- -------- | - | | R | | |==>| Bridge1 |<==>| PRR1 | | - | | I | | | ----------- -------- | - | | D | | | | - | | G | | | ----------- -------- | - | | E | | |==>| Bridge2 |<==>| PRR2 | | - | ----| | ----------- -------- | - | | | | - ---------------- ---------------------------------- - -Figure 1: An FPGA set up with a base image that created three regions. Each -region (PRR0-2) gets its own split of the busses that is independently gated by -a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be -reprogrammed independently while the rest of the system continues to function. - - -Sequence -======== - -When a DT overlay that targets an FPGA Region is applied, the FPGA Region will -do the following: - - 1. Disable appropriate FPGA bridges. - 2. Program the FPGA using the FPGA manager. - 3. Enable the FPGA bridges. - 4. The Device Tree overlay is accepted into the live tree. - 5. Child devices are populated. - -When the overlay is removed, the child nodes will be removed and the FPGA Region -will disable the bridges. - - -FPGA Region -=========== - -FPGA Regions represent FPGA's and FPGA PR regions in the device tree. An FPGA -Region brings together the elements needed to program on a running system and -add the child devices: - - * FPGA Manager - * FPGA Bridges - * image-specific information needed to to the programming. - * child nodes - -The intended use is that a Device Tree overlay (DTO) can be used to reprogram an -FPGA while an operating system is running. - -An FPGA Region that exists in the live Device Tree reflects the current state. -If the live tree shows a "firmware-name" property or child nodes under an FPGA -Region, the FPGA already has been programmed. A DTO that targets an FPGA Region -and adds the "firmware-name" property is taken as a request to reprogram the -FPGA. After reprogramming is successful, the overlay is accepted into the live -tree. - -The base FPGA Region in the device tree represents the FPGA and supports full -reconfiguration. It must include a phandle to an FPGA Manager. The base -FPGA region will be the child of one of the hardware bridges (the bridge that -allows register access) between the cpu and the FPGA. If there are more than -one bridge to control during FPGA programming, the region will also contain a -list of phandles to the additional hardware FPGA Bridges. - -For partial reconfiguration (PR), each PR region will have an FPGA Region. -These FPGA regions are children of FPGA bridges which are then children of the -base FPGA region. The "Full Reconfiguration to add PRR's" example below shows -this. - -If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA -Manager specified by its ancestor FPGA Region. This supports both the case -where the same FPGA Manager is used for all of an FPGA as well the case where -a different FPGA Manager is used for each region. - -FPGA Regions do not inherit their ancestor FPGA regions' bridges. This prevents -shutting down bridges that are upstream from the other active regions while one -region is getting reconfigured (see Figure 1 above). During PR, the FPGA's -hardware bridges remain enabled. The PR regions' bridges will be FPGA bridges -within the static image of the FPGA. - -Required properties: -- compatible : should contain "fpga-region" -- fpga-mgr : should contain a phandle to an FPGA Manager. Child FPGA Regions - inherit this property from their ancestor regions. An fpga-mgr property - in a region will override any inherited FPGA manager. -- #address-cells, #size-cells, ranges : must be present to handle address space - mapping for child nodes. - -Optional properties: -- firmware-name : should contain the name of an FPGA image file located on the - firmware search path. If this property shows up in a live device tree - it indicates that the FPGA has already been programmed with this image. - If this property is in an overlay targeting an FPGA region, it is a - request to program the FPGA with that image. -- fpga-bridges : should contain a list of phandles to FPGA Bridges that must be - controlled during FPGA programming along with the parent FPGA bridge. - This property is optional if the FPGA Manager handles the bridges. - If the fpga-region is the child of an fpga-bridge, the list should not - contain the parent bridge. -- partial-fpga-config : boolean, set if partial reconfiguration is to be done, - otherwise full reconfiguration is done. -- external-fpga-config : boolean, set if the FPGA has already been configured - prior to OS boot up. -- encrypted-fpga-config : boolean, set if the bitstream is encrypted -- region-unfreeze-timeout-us : The maximum time in microseconds to wait for - bridges to successfully become enabled after the region has been - programmed. -- region-freeze-timeout-us : The maximum time in microseconds to wait for - bridges to successfully become disabled before the region has been - programmed. -- config-complete-timeout-us : The maximum time in microseconds time for the - FPGA to go to operating mode after the region has been programmed. -- child nodes : devices in the FPGA after programming. - -In the example below, when an overlay is applied targeting fpga-region0, -fpga_mgr is used to program the FPGA. Two bridges are controlled during -programming: the parent fpga_bridge0 and fpga_bridge1. Because the region is -the child of fpga_bridge0, only fpga_bridge1 needs to be specified in the -fpga-bridges property. During programming, these bridges are disabled, the -firmware specified in the overlay is loaded to the FPGA using the FPGA manager -specified in the region. If FPGA programming succeeds, the bridges are -reenabled and the overlay makes it into the live device tree. The child devices -are then populated. If FPGA programming fails, the bridges are left disabled -and the overlay is rejected. The overlay's ranges property maps the lwhps -bridge's region (0xff200000) and the hps bridge's region (0xc0000000) for use by -the two child devices. - -Example: -Base tree contains: - - fpga_mgr: fpga-mgr@ff706000 { - compatible = "altr,socfpga-fpga-mgr"; - reg = <0xff706000 0x1000 - 0xffb90000 0x20>; - interrupts = <0 175 4>; - }; - - fpga_bridge0: fpga-bridge@ff400000 { - compatible = "altr,socfpga-lwhps2fpga-bridge"; - reg = <0xff400000 0x100000>; - resets = <&rst LWHPS2FPGA_RESET>; - clocks = <&l4_main_clk>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - fpga_region0: fpga-region0 { - compatible = "fpga-region"; - fpga-mgr = <&fpga_mgr>; - }; - }; - - fpga_bridge1: fpga-bridge@ff500000 { - compatible = "altr,socfpga-hps2fpga-bridge"; - reg = <0xff500000 0x10000>; - resets = <&rst HPS2FPGA_RESET>; - clocks = <&l4_main_clk>; - }; - -Overlay contains: - -/dts-v1/; -/plugin/; - -&fpga_region0 { - #address-cells = <1>; - #size-cells = <1>; - - firmware-name = "soc_system.rbf"; - fpga-bridges = <&fpga_bridge1>; - ranges = <0x20000 0xff200000 0x100000>, - <0x0 0xc0000000 0x20000000>; - - gpio@10040 { - compatible = "altr,pio-1.0"; - reg = <0x10040 0x20>; - altr,ngpio = <4>; - #gpio-cells = <2>; - clocks = <2>; - gpio-controller; - }; - - onchip-memory { - device_type = "memory"; - compatible = "altr,onchipmem-15.1"; - reg = <0x0 0x10000>; - }; -}; - - -Supported Use Models -==================== - -In all cases the live DT must have the FPGA Manager, FPGA Bridges (if any), and -a FPGA Region. The target of the Device Tree Overlay is the FPGA Region. Some -uses are specific to an FPGA device. - - * No FPGA Bridges - In this case, the FPGA Manager which programs the FPGA also handles the - bridges behind the scenes. No FPGA Bridge devices are needed for full - reconfiguration. - - * Full reconfiguration with hardware bridges - In this case, there are hardware bridges between the processor and FPGA that - need to be controlled during full reconfiguration. Before the overlay is - applied, the live DT must include the FPGA Manager, FPGA Bridges, and a - FPGA Region. The FPGA Region is the child of the bridge that allows - register access to the FPGA. Additional bridges may be listed in a - fpga-bridges property in the FPGA region or in the device tree overlay. - - * Partial reconfiguration with bridges in the FPGA - In this case, the FPGA will have one or more PRR's that may be programmed - separately while the rest of the FPGA can remain active. To manage this, - bridges need to exist in the FPGA that can gate the buses going to each FPGA - region while the buses are enabled for other sections. Before any partial - reconfiguration can be done, a base FPGA image must be loaded which includes - PRR's with FPGA bridges. The device tree should have an FPGA region for each - PRR. - -Device Tree Examples -==================== - -The intention of this section is to give some simple examples, focusing on -the placement of the elements detailed above, especially: - * FPGA Manager - * FPGA Bridges - * FPGA Region - * ranges - * target-path or target - -For the purposes of this section, I'm dividing the Device Tree into two parts, -each with its own requirements. The two parts are: - * The live DT prior to the overlay being added - * The DT overlay - -The live Device Tree must contain an FPGA Region, an FPGA Manager, and any FPGA -Bridges. The FPGA Region's "fpga-mgr" property specifies the manager by phandle -to handle programming the FPGA. If the FPGA Region is the child of another FPGA -Region, the parent's FPGA Manager is used. If FPGA Bridges need to be involved, -they are specified in the FPGA Region by the "fpga-bridges" property. During -FPGA programming, the FPGA Region will disable the bridges that are in its -"fpga-bridges" list and will re-enable them after FPGA programming has -succeeded. - -The Device Tree Overlay will contain: - * "target-path" or "target" - The insertion point where the contents of the overlay will go into the - live tree. target-path is a full path, while target is a phandle. - * "ranges" - The address space mapping from processor to FPGA bus(ses). - * "firmware-name" - Specifies the name of the FPGA image file on the firmware search - path. The search path is described in the firmware class documentation. - * "partial-fpga-config" - This binding is a boolean and should be present if partial reconfiguration - is to be done. - * child nodes corresponding to hardware that will be loaded in this region of - the FPGA. - -Device Tree Example: Full Reconfiguration without Bridges -========================================================= - -Live Device Tree contains: - fpga_mgr0: fpga-mgr@f8007000 { - compatible = "xlnx,zynq-devcfg-1.0"; - reg = <0xf8007000 0x100>; - interrupt-parent = <&intc>; - interrupts = <0 8 4>; - clocks = <&clkc 12>; - clock-names = "ref_clk"; - syscon = <&slcr>; - }; - - fpga_region0: fpga-region0 { - compatible = "fpga-region"; - fpga-mgr = <&fpga_mgr0>; - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - }; - -DT Overlay contains: - -/dts-v1/; -/plugin/; - -&fpga_region0 { - #address-cells = <1>; - #size-cells = <1>; - - firmware-name = "zynq-gpio.bin"; - - gpio1: gpio@40000000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = <0x40000000 0x10000>; - gpio-controller; - #gpio-cells = <0x2>; - xlnx,gpio-width= <0x6>; - }; -}; - -Device Tree Example: Full Reconfiguration to add PRR's -====================================================== - -The base FPGA Region is specified similar to the first example above. - -This example programs the FPGA to have two regions that can later be partially -configured. Each region has its own bridge in the FPGA fabric. - -DT Overlay contains: - -/dts-v1/; -/plugin/; - -&fpga_region0 { - #address-cells = <1>; - #size-cells = <1>; - - firmware-name = "base.rbf"; - - fpga-bridge@4400 { - compatible = "altr,freeze-bridge-controller"; - reg = <0x4400 0x10>; - - fpga_region1: fpga-region1 { - compatible = "fpga-region"; - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - }; - }; - - fpga-bridge@4420 { - compatible = "altr,freeze-bridge-controller"; - reg = <0x4420 0x10>; - - fpga_region2: fpga-region2 { - compatible = "fpga-region"; - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - }; - }; -}; - -Device Tree Example: Partial Reconfiguration -============================================ - -This example reprograms one of the PRR's set up in the previous example. - -The sequence that occurs when this overlay is similar to the above, the only -differences are that the FPGA is partially reconfigured due to the -"partial-fpga-config" boolean and the only bridge that is controlled during -programming is the FPGA based bridge of fpga_region1. - -/dts-v1/; -/plugin/; - -&fpga_region1 { - #address-cells = <1>; - #size-cells = <1>; - - firmware-name = "soc_image2.rbf"; - partial-fpga-config; - - gpio@10040 { - compatible = "altr,pio-1.0"; - reg = <0x10040 0x20>; - clocks = <0x2>; - altr,ngpio = <0x4>; - #gpio-cells = <0x2>; - gpio-controller; - }; -}; - -Constraints -=========== - -It is beyond the scope of this document to fully describe all the FPGA design -constraints required to make partial reconfiguration work[1] [2] [3], but a few -deserve quick mention. - -A persona must have boundary connections that line up with those of the partition -or region it is designed to go into. - -During programming, transactions through those connections must be stopped and -the connections must be held at a fixed logic level. This can be achieved by -FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration. - --- -[1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf -[2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf -[3] https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.yaml b/Documentation/devicetree/bindings/fpga/fpga-region.yaml new file mode 100644 index 000000000000..77554885a6c4 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/fpga-region.yaml @@ -0,0 +1,358 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/fpga-region.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FPGA Region + +maintainers: + - Michal Simek + +description: | + CONTENTS + - Introduction + - Terminology + - Sequence + - FPGA Region + - Supported Use Models + - Constraints + + + Introduction + ============ + + FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in + the Device Tree. FPGA Regions provide a way to program FPGAs under device tree + control. + + The documentation hits some of the high points of FPGA usage and + attempts to include terminology used by both major FPGA manufacturers. This + document isn't a replacement for any manufacturers specifications for FPGA + usage. + + + Terminology + =========== + + Full Reconfiguration + * The entire FPGA is programmed. + + Partial Reconfiguration (PR) + * A section of an FPGA is reprogrammed while the rest of the FPGA is not + affected. + * Not all FPGA's support PR. + + Partial Reconfiguration Region (PRR) + * Also called a "reconfigurable partition" + * A PRR is a specific section of an FPGA reserved for reconfiguration. + * A base (or static) FPGA image may create a set of PRR's that later may + be independently reprogrammed many times. + * The size and specific location of each PRR is fixed. + * The connections at the edge of each PRR are fixed. The image that is loaded + into a PRR must fit and must use a subset of the region's connections. + * The busses within the FPGA are split such that each region gets its own + branch that may be gated independently. + + Persona + * Also called a "partial bit stream" + * An FPGA image that is designed to be loaded into a PRR. There may be + any number of personas designed to fit into a PRR, but only one at a time + may be loaded. + * A persona may create more regions. + + FPGA Bridge + * FPGA Bridges gate bus signals between a host and FPGA. + * FPGA Bridges should be disabled while the FPGA is being programmed to + prevent spurious signals on the cpu bus and to the soft logic. + * FPGA bridges may be actual hardware or soft logic on an FPGA. + * During Full Reconfiguration, hardware bridges between the host and FPGA + will be disabled. + * During Partial Reconfiguration of a specific region, that region's bridge + will be used to gate the busses. Traffic to other regions is not affected. + * In some implementations, the FPGA Manager transparently handles gating the + buses, eliminating the need to show the hardware FPGA bridges in the + device tree. + * An FPGA image may create a set of reprogrammable regions, each having its + own bridge and its own split of the busses in the FPGA. + + FPGA Manager + * An FPGA Manager is a hardware block that programs an FPGA under the control + of a host processor. + + Base Image + * Also called the "static image" + * An FPGA image that is designed to do full reconfiguration of the FPGA. + * A base image may set up a set of partial reconfiguration regions that may + later be reprogrammed. + + ---------------- ---------------------------------- + | Host CPU | | FPGA | + | | | | + | ----| | ----------- -------- | + | | H | | |==>| Bridge0 |<==>| PRR0 | | + | | W | | | ----------- -------- | + | | | | | | + | | B |<=====>|<==| ----------- -------- | + | | R | | |==>| Bridge1 |<==>| PRR1 | | + | | I | | | ----------- -------- | + | | D | | | | + | | G | | | ----------- -------- | + | | E | | |==>| Bridge2 |<==>| PRR2 | | + | ----| | ----------- -------- | + | | | | + ---------------- ---------------------------------- + + Figure 1: An FPGA set up with a base image that created three regions. Each + region (PRR0-2) gets its own split of the busses that is independently gated by + a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be + reprogrammed independently while the rest of the system continues to function. + + + Sequence + ======== + + When a DT overlay that targets an FPGA Region is applied, the FPGA Region will + do the following: + + 1. Disable appropriate FPGA bridges. + 2. Program the FPGA using the FPGA manager. + 3. Enable the FPGA bridges. + 4. The Device Tree overlay is accepted into the live tree. + 5. Child devices are populated. + + When the overlay is removed, the child nodes will be removed and the FPGA Region + will disable the bridges. + + + FPGA Region + =========== + + FPGA Regions represent FPGA's and FPGA PR regions in the device tree. An FPGA + Region brings together the elements needed to program on a running system and + add the child devices: + + * FPGA Manager + * FPGA Bridges + * image-specific information needed to the programming. + * child nodes + + The intended use is that a Device Tree overlay (DTO) can be used to reprogram an + FPGA while an operating system is running. + + An FPGA Region that exists in the live Device Tree reflects the current state. + If the live tree shows a "firmware-name" property or child nodes under an FPGA + Region, the FPGA already has been programmed. A DTO that targets an FPGA Region + and adds the "firmware-name" property is taken as a request to reprogram the + FPGA. After reprogramming is successful, the overlay is accepted into the live + tree. + + The base FPGA Region in the device tree represents the FPGA and supports full + reconfiguration. It must include a phandle to an FPGA Manager. The base + FPGA region will be the child of one of the hardware bridges (the bridge that + allows register access) between the cpu and the FPGA. If there are more than + one bridge to control during FPGA programming, the region will also contain a + list of phandles to the additional hardware FPGA Bridges. + + For partial reconfiguration (PR), each PR region will have an FPGA Region. + These FPGA regions are children of FPGA bridges which are then children of the + base FPGA region. The "Full Reconfiguration to add PRR's" example below shows + this. + + If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA + Manager specified by its ancestor FPGA Region. This supports both the case + where the same FPGA Manager is used for all of an FPGA as well the case where + a different FPGA Manager is used for each region. + + FPGA Regions do not inherit their ancestor FPGA regions' bridges. This prevents + shutting down bridges that are upstream from the other active regions while one + region is getting reconfigured (see Figure 1 above). During PR, the FPGA's + hardware bridges remain enabled. The PR regions' bridges will be FPGA bridges + within the static image of the FPGA. + + + Supported Use Models + ==================== + + In all cases the live DT must have the FPGA Manager, FPGA Bridges (if any), and + a FPGA Region. The target of the Device Tree Overlay is the FPGA Region. Some + uses are specific to an FPGA device. + + * No FPGA Bridges + In this case, the FPGA Manager which programs the FPGA also handles the + bridges behind the scenes. No FPGA Bridge devices are needed for full + reconfiguration. + + * Full reconfiguration with hardware bridges + In this case, there are hardware bridges between the processor and FPGA that + need to be controlled during full reconfiguration. Before the overlay is + applied, the live DT must include the FPGA Manager, FPGA Bridges, and a + FPGA Region. The FPGA Region is the child of the bridge that allows + register access to the FPGA. Additional bridges may be listed in a + fpga-bridges property in the FPGA region or in the device tree overlay. + + * Partial reconfiguration with bridges in the FPGA + In this case, the FPGA will have one or more PRR's that may be programmed + separately while the rest of the FPGA can remain active. To manage this, + bridges need to exist in the FPGA that can gate the buses going to each FPGA + region while the buses are enabled for other sections. Before any partial + reconfiguration can be done, a base FPGA image must be loaded which includes + PRR's with FPGA bridges. The device tree should have an FPGA region for each + PRR. + + Constraints + =========== + + It is beyond the scope of this document to fully describe all the FPGA design + constraints required to make partial reconfiguration work[1] [2] [3], but a few + deserve quick mention. + + A persona must have boundary connections that line up with those of the partition + or region it is designed to go into. + + During programming, transactions through those connections must be stopped and + the connections must be held at a fixed logic level. This can be achieved by + FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration. + + -- + [1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf + [2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf + [3] https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf + +properties: + $nodename: + pattern: "^fpga-region(@.*|-([0-9]|[1-9][0-9]+))?$" + + compatible: + const: fpga-region + + reg: + maxItems: 1 + + ranges: true + "#address-cells": true + "#size-cells": true + + config-complete-timeout-us: + description: + The maximum time in microseconds time for the FPGA to go to operating + mode after the region has been programmed. + + encrypted-fpga-config: + type: boolean + description: + Set if the bitstream is encrypted. + + external-fpga-config: + type: boolean + description: + Set if the FPGA has already been configured prior to OS boot up. + + firmware-name: + maxItems: 1 + description: + Should contain the name of an FPGA image file located on the firmware + search path. If this property shows up in a live device tree it indicates + that the FPGA has already been programmed with this image. + If this property is in an overlay targeting an FPGA region, it is + a request to program the FPGA with that image. + + fpga-bridges: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should contain a list of phandles to FPGA Bridges that must be + controlled during FPGA programming along with the parent FPGA bridge. + This property is optional if the FPGA Manager handles the bridges. + If the fpga-region is the child of an fpga-bridge, the list should not + contain the parent bridge. + + fpga-mgr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Should contain a phandle to an FPGA Manager. Child FPGA Regions + inherit this property from their ancestor regions. An fpga-mgr property + in a region will override any inherited FPGA manager. + + partial-fpga-config: + type: boolean + description: + Set if partial reconfiguration is to be done, otherwise full + reconfiguration is done. + + region-freeze-timeout-us: + description: + The maximum time in microseconds to wait for bridges to successfully + become disabled before the region has been programmed. + + region-unfreeze-timeout-us: + description: + The maximum time in microseconds to wait for bridges to successfully + become enabled after the region has been programmed. + +required: + - compatible + - fpga-mgr + +additionalProperties: + type: object + +examples: + - | + /* + * Full Reconfiguration without Bridges with DT overlay + */ + fpga_region0: fpga-region@0 { + compatible = "fpga-region"; + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + fpga-mgr = <&fpga_mgr0>; + ranges = <0x10000000 0x20000000 0x10000000>; + + /* DT Overlay contains: &fpga_region0 */ + firmware-name = "zynq-gpio.bin"; + gpio@40000000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0x40000000 0x10000>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + - | + /* + * Partial reconfiguration with bridge + */ + fpga_region1: fpga-region@0 { + compatible = "fpga-region"; + reg = <0 0>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + fpga-mgr = <&fpga_mgr1>; + fpga-bridges = <&fpga_bridge1>; + partial-fpga-config; + + /* DT Overlay contains: &fpga_region1 */ + firmware-name = "zynq-gpio-partial.bin"; + clk: clock { + compatible = "fixed-factor-clock"; + clocks = <&parentclk>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + axi { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + gpio@40000000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = <0x40000000 0x10000>; + #gpio-cells = <2>; + gpio-controller; + clocks = <&clk>; + }; + }; + }; From d4d8fbcef03f590288b44955d8d51e334627b013 Mon Sep 17 00:00:00 2001 From: Dragan Cvetic Date: Wed, 31 Jan 2024 17:06:45 +0000 Subject: [PATCH 10/56] dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml Convert AMD (Xilinx) sd-fec bindings to yaml format, so it can validate dt-entries as well as any future additions to yaml. Change in clocks is due to IP is itself configurable and only the first two clocks are in all combinations. The last 6 clocks can be present in some of them. It means order is not really fixed and any combination is possible. Interrupt may or may not be present. The documentation for sd-fec bindings is now YAML, so update the MAINTAINERS file. Update the link to the new yaml file in xilinx_sdfec.rst. Signed-off-by: Dragan Cvetic Link: https://lore.kernel.org/r/20240131170650.530079-1-dragan.cvetic@amd.com Signed-off-by: Rob Herring --- .../devicetree/bindings/misc/xlnx,sd-fec.txt | 58 -------- .../devicetree/bindings/misc/xlnx,sd-fec.yaml | 140 ++++++++++++++++++ Documentation/misc-devices/xilinx_sdfec.rst | 2 +- MAINTAINERS | 2 +- 4 files changed, 142 insertions(+), 60 deletions(-) delete mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt create mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml diff --git a/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt b/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt deleted file mode 100644 index e3289634fa30..000000000000 --- a/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt +++ /dev/null @@ -1,58 +0,0 @@ -* Xilinx SDFEC(16nm) IP * - -The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block -which provides high-throughput LDPC and Turbo Code implementations. -The LDPC decode & encode functionality is capable of covering a range of -customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality -principally covers codes used by LTE. The FEC Engine offers significant -power and area savings versus implementations done in the FPGA fabric. - - -Required properties: -- compatible: Must be "xlnx,sd-fec-1.1" -- clock-names : List of input clock names from the following: - - "core_clk", Main processing clock for processing core (required) - - "s_axi_aclk", AXI4-Lite memory-mapped slave interface clock (required) - - "s_axis_din_aclk", DIN AXI4-Stream Slave interface clock (optional) - - "s_axis_din_words-aclk", DIN_WORDS AXI4-Stream Slave interface clock (optional) - - "s_axis_ctrl_aclk", Control input AXI4-Stream Slave interface clock (optional) - - "m_axis_dout_aclk", DOUT AXI4-Stream Master interface clock (optional) - - "m_axis_dout_words_aclk", DOUT_WORDS AXI4-Stream Master interface clock (optional) - - "m_axis_status_aclk", Status output AXI4-Stream Master interface clock (optional) -- clocks : Clock phandles (see clock_bindings.txt for details). -- reg: Should contain Xilinx SDFEC 16nm Hardened IP block registers - location and length. -- xlnx,sdfec-code : Should contain "ldpc" or "turbo" to describe the codes - being used. -- xlnx,sdfec-din-words : A value 0 indicates that the DIN_WORDS interface is - driven with a fixed value and is not present on the device, a value of 1 - configures the DIN_WORDS to be block based, while a value of 2 configures the - DIN_WORDS input to be supplied for each AXI transaction. -- xlnx,sdfec-din-width : Configures the DIN AXI stream where a value of 1 - configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width - of "4x128b". -- xlnx,sdfec-dout-words : A value 0 indicates that the DOUT_WORDS interface is - driven with a fixed value and is not present on the device, a value of 1 - configures the DOUT_WORDS to be block based, while a value of 2 configures the - DOUT_WORDS input to be supplied for each AXI transaction. -- xlnx,sdfec-dout-width : Configures the DOUT AXI stream where a value of 1 - configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width - of "4x128b". -Optional properties: -- interrupts: should contain SDFEC interrupt number - -Example ---------------------------------------- - sd_fec_0: sd-fec@a0040000 { - compatible = "xlnx,sd-fec-1.1"; - clock-names = "core_clk","s_axi_aclk","s_axis_ctrl_aclk","s_axis_din_aclk","m_axis_status_aclk","m_axis_dout_aclk"; - clocks = <&misc_clk_2>,<&misc_clk_0>,<&misc_clk_1>,<&misc_clk_1>,<&misc_clk_1>, <&misc_clk_1>; - reg = <0x0 0xa0040000 0x0 0x40000>; - interrupt-parent = <&axi_intc>; - interrupts = <1 0>; - xlnx,sdfec-code = "ldpc"; - xlnx,sdfec-din-words = <0>; - xlnx,sdfec-din-width = <2>; - xlnx,sdfec-dout-words = <0>; - xlnx,sdfec-dout-width = <1>; - }; diff --git a/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml b/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml new file mode 100644 index 000000000000..9bd210337426 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx SDFEC(16nm) IP + +maintainers: + - Cvetic, Dragan + - Erim, Salih + +description: + The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block + which provides high-throughput LDPC and Turbo Code implementations. + The LDPC decode & encode functionality is capable of covering a range of + customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality + principally covers codes used by LTE. The FEC Engine offers significant + power and area savings versus implementations done in the FPGA fabric. + +properties: + compatible: + const: xlnx,sd-fec-1.1 + + reg: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 8 + additionalItems: true + items: + - description: Main processing clock for processing core + - description: AXI4-Lite memory-mapped slave interface clock + - description: Control input AXI4-Stream Slave interface clock + - description: DIN AXI4-Stream Slave interface clock + - description: Status output AXI4-Stream Master interface clock + - description: DOUT AXI4-Stream Master interface clock + - description: DIN_WORDS AXI4-Stream Slave interface clock + - description: DOUT_WORDS AXI4-Stream Master interface clock + + clock-names: + allOf: + - minItems: 2 + maxItems: 8 + additionalItems: true + items: + - const: core_clk + - const: s_axi_aclk + - items: + enum: + - core_clk + - s_axi_aclk + - s_axis_ctrl_aclk + - s_axis_din_aclk + - m_axis_status_aclk + - m_axis_dout_aclk + - s_axis_din_words_aclk + - m_axis_dout_words_aclk + + interrupts: + maxItems: 1 + + xlnx,sdfec-code: + description: + The SD-FEC integrated block supports Low Density Parity Check (LDPC) + decoding and encoding and Turbo code decoding. The LDPC codes used are + highly configurable, and the specific code used can be specified on + a codeword-by-codeword basis. The Turbo code decoding is required by LTE + standard. + $ref: /schemas/types.yaml#/definitions/string + items: + enum: [ ldpc, turbo ] + + xlnx,sdfec-din-width: + description: + Configures the DIN AXI stream where a value of 1 + configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width + of "4x128b". + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4 ] + + xlnx,sdfec-din-words: + description: + A value 0 indicates that the DIN_WORDS interface is + driven with a fixed value and is not present on the device, a value of 1 + configures the DIN_WORDS to be block based, while a value of 2 configures the + DIN_WORDS input to be supplied for each AXI transaction. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2 ] + + xlnx,sdfec-dout-width: + description: + Configures the DOUT AXI stream where a value of 1 configures a width of "1x128b", + 2 a width of "2x128b" and 4 configures a width of "4x128b". + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4 ] + + xlnx,sdfec-dout-words: + description: + A value 0 indicates that the DOUT_WORDS interface is + driven with a fixed value and is not present on the device, a value of 1 + configures the DOUT_WORDS to be block based, while a value of 2 configures the + DOUT_WORDS input to be supplied for each AXI transaction. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2 ] + +required: + - compatible + - reg + - clocks + - clock-names + - xlnx,sdfec-code + - xlnx,sdfec-din-width + - xlnx,sdfec-din-words + - xlnx,sdfec-dout-width + - xlnx,sdfec-dout-words + +additionalProperties: false + +examples: + - | + #include + + sd-fec@a0040000 { + compatible = "xlnx,sd-fec-1.1"; + reg = <0xa0040000 0x40000>; + clocks = <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_1>, + <&misc_clk_1>, <&misc_clk_1>; + clock-names = "core_clk", "s_axi_aclk", "s_axis_ctrl_aclk", + "s_axis_din_aclk", "m_axis_status_aclk", + "m_axis_dout_aclk"; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + xlnx,sdfec-code = "ldpc"; + xlnx,sdfec-din-width = <2>; + xlnx,sdfec-din-words = <0>; + xlnx,sdfec-dout-width = <1>; + xlnx,sdfec-dout-words = <0>; + }; + diff --git a/Documentation/misc-devices/xilinx_sdfec.rst b/Documentation/misc-devices/xilinx_sdfec.rst index 8c8a289d69a3..698e6630f3a7 100644 --- a/Documentation/misc-devices/xilinx_sdfec.rst +++ b/Documentation/misc-devices/xilinx_sdfec.rst @@ -29,7 +29,7 @@ follows: - Does not support shared LDPC code table wraparound The device tree entry is described in: -`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt `_ +`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml `_ Modes of Operation diff --git a/MAINTAINERS b/MAINTAINERS index 42b43337c266..b01f890ec789 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -24154,7 +24154,7 @@ XILINX SD-FEC IP CORES M: Derek Kiernan M: Dragan Cvetic S: Maintained -F: Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt +F: Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml F: Documentation/misc-devices/xilinx_sdfec.rst F: drivers/misc/Kconfig F: drivers/misc/Makefile From 281dc6c69b0ef3e30781451e141628618152a8c0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 9 Jan 2024 09:25:11 +0100 Subject: [PATCH 11/56] dt-bindings: mux: restrict node name suffixes Make the pattern matching node names a bit stricter to improve DTS consistency. The pattern is restricted to -N suffixes to decimal numbers. Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Acked-by: Peter Rosin Link: https://lore.kernel.org/r/20240109082511.15278-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/mux/mux-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mux/mux-controller.yaml b/Documentation/devicetree/bindings/mux/mux-controller.yaml index 8b943082a241..571ad9e13ecf 100644 --- a/Documentation/devicetree/bindings/mux/mux-controller.yaml +++ b/Documentation/devicetree/bindings/mux/mux-controller.yaml @@ -74,7 +74,7 @@ select: properties: $nodename: - pattern: '^mux-controller(@.*|-[0-9a-f]+)?$' + pattern: '^mux-controller(@.*|-([0-9]|[1-9][0-9]+))?$' '#mux-control-cells': enum: [ 0, 1 ] From 6284d33d1749e492596c54a590603d61fb7afc98 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 Feb 2024 08:58:05 +0100 Subject: [PATCH 12/56] dt-bindings: trivial-devices: sort entries alphanumerically Sort entries alphanumerically. This was a semi manual job with help of: cat Documentation/devicetree/bindings/trivial-devices.yaml | grep ' - ' > old cat old | sort -n > new diff -ubB old new Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/20240201075805.7492-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../devicetree/bindings/trivial-devices.yaml | 73 ++++++++++--------- 1 file changed, 37 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml index 5b52950e6bfc..41982a41398a 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -28,6 +28,7 @@ properties: compatible: items: + # Entries are sorted alphanumerically by the compatible - enum: # Acbel fsg032 power supply - acbel,fsg032 @@ -49,12 +50,12 @@ properties: - ams,iaq-core # i2c serial eeprom (24cxx) - at,24c08 + # i2c h/w elliptic curve crypto module + - atmel,atecc508a # ATSHA204 - i2c h/w symmetric crypto module - atmel,atsha204 # ATSHA204A - i2c h/w symmetric crypto module - atmel,atsha204a - # i2c h/w elliptic curve crypto module - - atmel,atecc508a # BPA-RS600: Power Supply - blutek,bpa-rs600 # Bosch Sensortec pressure, temperature, humididty and VOC sensor @@ -115,20 +116,6 @@ properties: - fsl,mpl3115 # MPR121: Proximity Capacitive Touch Sensor Controller - fsl,mpr121 - # Monolithic Power Systems Inc. multi-phase controller mp2856 - - mps,mp2856 - # Monolithic Power Systems Inc. multi-phase controller mp2857 - - mps,mp2857 - # Monolithic Power Systems Inc. multi-phase controller mp2888 - - mps,mp2888 - # Monolithic Power Systems Inc. multi-phase controller mp2971 - - mps,mp2971 - # Monolithic Power Systems Inc. multi-phase controller mp2973 - - mps,mp2973 - # Monolithic Power Systems Inc. multi-phase controller mp2975 - - mps,mp2975 - # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5990 - - mps,mp5990 # Honeywell Humidicon HIH-6130 humidity/temperature sensor - honeywell,hi6130 # IBM Common Form Factor Power Supply Versions (all versions) @@ -197,6 +184,8 @@ properties: - maxim,max1237 # Temperature Sensor, I2C interface - maxim,max1619 + # 3-Channel Remote Temperature Sensor + - maxim,max31730 # 10-bit 10 kOhm linear programmable voltage divider - maxim,max5481 # 10-bit 50 kOhm linear programmable voltage divider @@ -209,8 +198,6 @@ properties: - maxim,max6621 # 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface - maxim,max6625 - # 3-Channel Remote Temperature Sensor - - maxim,max31730 # mCube 3-axis 8-bit digital accelerometer - mcube,mc3230 # Measurement Specialities I2C temperature and humidity sensor @@ -241,8 +228,6 @@ properties: - memsic,mxc6655 # Menlo on-board CPLD trivial SPI device - menlo,m53cpld - # Micron SPI NOR Authenta - - micron,spi-authenta # Microchip differential I2C ADC, 1 Channel, 18 bit - microchip,mcp3421 # Microchip differential I2C ADC, 2 Channel, 18 bit @@ -259,40 +244,56 @@ properties: - microchip,mcp3427 # Microchip differential I2C ADC, 4 Channel, 16 bit - microchip,mcp3428 - # Microchip 7-bit Single I2C Digital POT (5k) - - microchip,mcp4017-502 # Microchip 7-bit Single I2C Digital POT (10k) - microchip,mcp4017-103 - # Microchip 7-bit Single I2C Digital POT (50k) - - microchip,mcp4017-503 # Microchip 7-bit Single I2C Digital POT (100k) - microchip,mcp4017-104 # Microchip 7-bit Single I2C Digital POT (5k) - - microchip,mcp4018-502 + - microchip,mcp4017-502 + # Microchip 7-bit Single I2C Digital POT (50k) + - microchip,mcp4017-503 # Microchip 7-bit Single I2C Digital POT (10k) - microchip,mcp4018-103 - # Microchip 7-bit Single I2C Digital POT (50k) - - microchip,mcp4018-503 # Microchip 7-bit Single I2C Digital POT (100k) - microchip,mcp4018-104 # Microchip 7-bit Single I2C Digital POT (5k) - - microchip,mcp4019-502 + - microchip,mcp4018-502 + # Microchip 7-bit Single I2C Digital POT (50k) + - microchip,mcp4018-503 # Microchip 7-bit Single I2C Digital POT (10k) - microchip,mcp4019-103 - # Microchip 7-bit Single I2C Digital POT (50k) - - microchip,mcp4019-503 # Microchip 7-bit Single I2C Digital POT (100k) - microchip,mcp4019-104 + # Microchip 7-bit Single I2C Digital POT (5k) + - microchip,mcp4019-502 + # Microchip 7-bit Single I2C Digital POT (50k) + - microchip,mcp4019-503 # PWM Fan Speed Controller With Fan Fault Detection - microchip,tc654 # PWM Fan Speed Controller With Fan Fault Detection - microchip,tc655 + # Micron SPI NOR Authenta + - micron,spi-authenta # MiraMEMS DA226 2-axis 14-bit digital accelerometer - miramems,da226 # MiraMEMS DA280 3-axis 14-bit digital accelerometer - miramems,da280 # MiraMEMS DA311 3-axis 12-bit digital accelerometer - miramems,da311 + # Monolithic Power Systems Inc. multi-phase controller mp2856 + - mps,mp2856 + # Monolithic Power Systems Inc. multi-phase controller mp2857 + - mps,mp2857 + # Monolithic Power Systems Inc. multi-phase controller mp2888 + - mps,mp2888 + # Monolithic Power Systems Inc. multi-phase controller mp2971 + - mps,mp2971 + # Monolithic Power Systems Inc. multi-phase controller mp2973 + - mps,mp2973 + # Monolithic Power Systems Inc. multi-phase controller mp2975 + - mps,mp2975 + # Monolithic Power Systems Inc. multi-phase hot-swap controller mp5990 + - mps,mp5990 # Temperature sensor with integrated fan control - national,lm63 # Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor @@ -323,12 +324,12 @@ properties: - samsung,exynos-sataphy-i2c # Semtech sx1301 baseband processor - semtech,sx1301 - # Sensirion low power multi-pixel gas sensor with I2C interface - - sensirion,sgpc3 # Sensirion multi-pixel gas sensor with I2C interface - sensirion,sgp30 # Sensirion gas sensor with I2C interface - sensirion,sgp40 + # Sensirion low power multi-pixel gas sensor with I2C interface + - sensirion,sgpc3 # Sensirion temperature & humidity sensor with I2C interface - sensirion,sht4x # Sensortek 3 axis accelerometer @@ -374,8 +375,6 @@ properties: - ti,lm74 # Temperature sensor with integrated fan control - ti,lm96000 - # I2C Touch-Screen Controller - - ti,tsc2003 # Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface - ti,tmp103 # Thermometer with SPI interface @@ -397,10 +396,12 @@ properties: - ti,tps544b25 - ti,tps544c20 - ti,tps544c25 - # Winbond/Nuvoton H/W Monitor - - winbond,w83793 + # I2C Touch-Screen Controller + - ti,tsc2003 # Vicor Corporation Digital Supervisor - vicor,pli1209bc + # Winbond/Nuvoton H/W Monitor + - winbond,w83793 required: - compatible From 4c3b386c46065c0d26ae5503e73d6634f24e2d36 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 5 Feb 2024 05:37:19 +0000 Subject: [PATCH 13/56] of: property: add missing kerneldoc for of_graph_get_endpoint_count() of_graph_get_endpoint_count() doesn't have kerneldoc. Add it. Signed-off-by: Kuninori Morimoto Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/87r0hrcvzk.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Rob Herring --- drivers/of/property.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/of/property.c b/drivers/of/property.c index a02a985c13ba..455dda225556 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -812,6 +812,12 @@ struct device_node *of_graph_get_remote_port(const struct device_node *node) } EXPORT_SYMBOL(of_graph_get_remote_port); +/** + * of_graph_get_endpoint_count() - get the number of endpoints in a device node + * @np: parent device node containing ports and endpoints + * + * Return: count of endpoint of this device node + */ int of_graph_get_endpoint_count(const struct device_node *np) { struct device_node *endpoint; From 574849054d97cee5be78d6c149d84685647fe774 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 5 Feb 2024 05:37:28 +0000 Subject: [PATCH 14/56] of: property: use unsigned int return on of_graph_get_endpoint_count() Because of of_graph_get_endpoint_count() doesn't report error, just return count of endpoint, the return type should be unsigned. Tidyup it. Signed-off-by: Kuninori Morimoto Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/87plxbcvzb.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Rob Herring --- drivers/of/property.c | 4 ++-- include/linux/of_graph.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/of/property.c b/drivers/of/property.c index 455dda225556..470d1eb5e56d 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -818,10 +818,10 @@ EXPORT_SYMBOL(of_graph_get_remote_port); * * Return: count of endpoint of this device node */ -int of_graph_get_endpoint_count(const struct device_node *np) +unsigned int of_graph_get_endpoint_count(const struct device_node *np) { struct device_node *endpoint; - int num = 0; + unsigned int num = 0; for_each_endpoint_of_node(np, endpoint) num++; diff --git a/include/linux/of_graph.h b/include/linux/of_graph.h index 4d7756087b6b..a4bea62bfa29 100644 --- a/include/linux/of_graph.h +++ b/include/linux/of_graph.h @@ -41,7 +41,7 @@ struct of_endpoint { bool of_graph_is_present(const struct device_node *node); int of_graph_parse_endpoint(const struct device_node *node, struct of_endpoint *endpoint); -int of_graph_get_endpoint_count(const struct device_node *np); +unsigned int of_graph_get_endpoint_count(const struct device_node *np); struct device_node *of_graph_get_port_by_id(struct device_node *node, u32 id); struct device_node *of_graph_get_next_endpoint(const struct device_node *parent, struct device_node *previous); @@ -68,7 +68,7 @@ static inline int of_graph_parse_endpoint(const struct device_node *node, return -ENOSYS; } -static inline int of_graph_get_endpoint_count(const struct device_node *np) +static inline unsigned int of_graph_get_endpoint_count(const struct device_node *np) { return 0; } From 0eaef900b05f0bd111e94602d60c64a282dfa1ef Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 22 Jan 2024 17:17:38 +0800 Subject: [PATCH 15/56] dt-bindings: can: fsl,flexcan: add i.MX95 compatible string Add i.MX95 flexcan which is compatible i.MX93 flexcan Signed-off-by: Peng Fan Acked-by: Marc Kleine-Budde Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240122091738.2078746-1-peng.fan@oss.nxp.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml index 4162469c3c08..f197d9b516bb 100644 --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -38,6 +38,9 @@ properties: - fsl,imx6ul-flexcan - fsl,imx6sx-flexcan - const: fsl,imx6q-flexcan + - items: + - const: fsl,imx95-flexcan + - const: fsl,imx93-flexcan - items: - enum: - fsl,ls1028ar1-flexcan From 15ff10ea77a526c3e0b73e97450966e271a501e8 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 24 Jan 2024 13:05:50 -0600 Subject: [PATCH 16/56] dt-bindings: i2c: mux: i2c-demux-pinctrl: Drop i2c-mux.yaml reference The I2C de-mux is different than an I2C mux, so i2c-mux.yaml is not relevant and shouldn't be referenced. Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/20240124190552.1551929-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml b/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml index 2c08f2a7cf1e..dd3d24212551 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml @@ -32,7 +32,6 @@ description: | +-------------------------------+ allOf: - - $ref: i2c-mux.yaml - $ref: /schemas/i2c/i2c-controller.yaml# properties: From 91f9a47ddb9d6f24028540d843d8464b97f05b0a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 24 Jan 2024 13:05:51 -0600 Subject: [PATCH 17/56] dt-bindings: i2c: mux: i2c-demux-pinctrl: Define "i2c-parent" constraints The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. "i2c-parent" is the former and needs to constrain each entry to a single phandle value. Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/20240124190552.1551929-2-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml b/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml index dd3d24212551..b813f6d4810c 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml @@ -40,6 +40,8 @@ properties: i2c-parent: $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 description: List of phandles of I2C masters available for selection. The first one will be used as default. From 9f1a0769f1939456f3b4ce388f021963d20afbf8 Mon Sep 17 00:00:00 2001 From: Saravana Kannan Date: Sat, 10 Feb 2024 15:15:12 -0800 Subject: [PATCH 18/56] MAINTAINERS: of: Add Saravana Kannan Adding myself as a second maintainer for Open Firmware and Device Tree to help Rob out with reviews and other maintainer work. Cc: devicetree@vger.kernel.org Signed-off-by: Saravana Kannan Link: https://lore.kernel.org/r/20240210231513.111117-1-saravanak@google.com Signed-off-by: Rob Herring --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index b01f890ec789..45c6c13b4edf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16359,6 +16359,7 @@ F: drivers/infiniband/ulp/opa_vnic OPEN FIRMWARE AND FLATTENED DEVICE TREE M: Rob Herring +M: Saravana Kannan L: devicetree@vger.kernel.org S: Maintained W: http://www.devicetree.org/ From e72638535dfa3b6435ccdaad04adbb9facc83ba5 Mon Sep 17 00:00:00 2001 From: Dawei Li Date: Mon, 5 Feb 2024 10:40:33 +0800 Subject: [PATCH 19/56] of: Make explicit cpu_to_be32 conversion to mute sparse warning Kernel test robot reports sparse warning: sparse warnings: (new ones prefixed by >>) >> drivers/of/base.c:1337:73: sparse: sparse: incorrect type in initializer (different base types) @@ expected restricted __be32 @@ got int @@ drivers/of/base.c:1337:73: sparse: expected restricted __be32 drivers/of/base.c:1337:73: sparse: got int Thus, Make explicit conversions to mute warning(Although BE and LE are exactly same in binary representation for 0/~0). Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202402042134.GEb3Bgwl-lkp@intel.com/ Signed-off-by: Dawei Li Link: https://lore.kernel.org/r/20240205024033.3572617-1-dawei.li@shingroup.cn Signed-off-by: Rob Herring --- drivers/of/base.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index b0ad8fc06e80..f71cda9ac09d 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1345,8 +1345,8 @@ int of_parse_phandle_with_args_map(const struct device_node *np, char *pass_name = NULL; struct device_node *cur, *new = NULL; const __be32 *map, *mask, *pass; - static const __be32 dummy_mask[] = { [0 ... MAX_PHANDLE_ARGS] = ~0 }; - static const __be32 dummy_pass[] = { [0 ... MAX_PHANDLE_ARGS] = 0 }; + static const __be32 dummy_mask[] = { [0 ... MAX_PHANDLE_ARGS] = cpu_to_be32(~0) }; + static const __be32 dummy_pass[] = { [0 ... MAX_PHANDLE_ARGS] = cpu_to_be32(0) }; __be32 initial_match_array[MAX_PHANDLE_ARGS]; const __be32 *match_array = initial_match_array; int i, ret, map_len, match; From 14354fc38a6f7a9c03c57fba2845a69f184990dc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 12 Feb 2024 12:08:27 +0100 Subject: [PATCH 20/56] dt-bindings: misc: qcom,fastrpc: Compute callbacks can be DMA coherent Apparently on Qualcomm SM8550 and SM8650 the FastRPC compute callbacks are DMA coherent: sm8650-qrd.dtb: fastrpc: compute-cb@2: 'dma-coherent' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Acked-by: Conor Dooley Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240212110827.59302-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml index 2dc3e245fa5d..c27a8f33d8d7 100644 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -77,6 +77,8 @@ patternProperties: reg: maxItems: 1 + dma-coherent: true + iommus: minItems: 1 maxItems: 3 From cb47c01b348857fda83bc7db33d7f37946a19c93 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Mon, 12 Feb 2024 15:08:39 +0100 Subject: [PATCH 21/56] dt-bindings: vendor-prefixes: add smartrg MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SmartRG described itself as a CPE manufacturer and produced few home network devices (e.g. wireless routers). Their SmartRG SR400ac router (smartrg,sr400ac) is covered by in-Linux DT binding and DTS file. Signed-off-by: Rafał Miłecki Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240212140839.27150-1-zajec5@gmail.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1a0dc04f1db4..71e37cea8689 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1297,6 +1297,8 @@ patternProperties: description: Skyworks Solutions, Inc. "^smartlabs,.*": description: SmartLabs LLC + "^smartrg,.*": + description: SmartRG, Inc. "^smi,.*": description: Silicon Motion Technology Corporation "^smsc,.*": From 6e7164714539eeed9c616d33547fdd3961e6a11c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 8 Feb 2024 11:53:27 +0100 Subject: [PATCH 22/56] dt-bindings: use capital "OR" for multiple licenses in SPDX Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../devicetree/bindings/display/panel/visionox,r66451.yaml | 2 +- Documentation/devicetree/bindings/usb/cypress,hx3.yaml | 2 +- include/dt-bindings/power/amlogic,c3-pwrc.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml b/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml index 6ba323683921..187840bb76c7 100644 --- a/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml +++ b/Documentation/devicetree/bindings/display/panel/visionox,r66451.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/display/panel/visionox,r66451.yaml# diff --git a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml index 47add0d85fb8..28096619a882 100644 --- a/Documentation/devicetree/bindings/usb/cypress,hx3.yaml +++ b/Documentation/devicetree/bindings/usb/cypress,hx3.yaml @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/usb/cypress,hx3.yaml# diff --git a/include/dt-bindings/power/amlogic,c3-pwrc.h b/include/dt-bindings/power/amlogic,c3-pwrc.h index 1d98a25b08a4..61759df4b2e7 100644 --- a/include/dt-bindings/power/amlogic,c3-pwrc.h +++ b/include/dt-bindings/power/amlogic,c3-pwrc.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ /* * Copyright (c) 2023 Amlogic, Inc. * Author: hongyu chen1 From ceecb37e49673019afdcf39e2d4fcfd5ebcf06c3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 12 Feb 2024 16:05:22 +0100 Subject: [PATCH 23/56] docs: dt: writing-schema: clarify that schema should describe hardware The 'title' and 'description' fields in Devicetree schema is supposed to describe hardware, not the binding itself. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240212150524.81819-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/writing-schema.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 0a6cf19a1459..2e5575e6a4e5 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -31,7 +31,7 @@ $schema Indicates the meta-schema the schema file adheres to. title - A one-line description on the contents of the binding schema. + A one-line description of the hardware being described in the binding schema. maintainers A DT specific property. Contains a list of email address(es) @@ -39,7 +39,7 @@ maintainers description Optional. A multi-line text block containing any detailed - information about this binding. It should contain things such as what the block + information about this hardware. It should contain things such as what the block or device does, standards the device conforms to, and links to datasheets for more information. From d9a41dc4de9fcdf6395a31bfcb737328e2b9fe1e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 12 Feb 2024 16:05:23 +0100 Subject: [PATCH 24/56] docs: dt: writing-schema: explain additional/unevaluatedProperties Add to the list of schema contents expected keywords with their explanation: additionalProperties and unevaluatedProperties. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240212150524.81819-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../devicetree/bindings/writing-schema.rst | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index 2e5575e6a4e5..a35859f3be00 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -71,6 +71,26 @@ required A list of DT properties from the 'properties' section that must always be present. +additionalProperties / unevaluatedProperties + Keywords controlling how schema will validate properties not matched by this + schema's 'properties' or 'patternProperties'. Each schema is supposed to + have exactly one of these keywords in top-level part, so either + additionalProperties or unevaluatedProperties. Nested nodes, so properties + being objects, are supposed to have one as well. + + * additionalProperties: false + Most common case, where no additional schema is referenced or if this + binding allows subset of properties from other referenced schemas. + + * unevaluatedProperties: false + Used when this binding references other schema whose all properties + should be allowed. + + * additionalProperties: true + Rare case, used for schemas implementing common set of properties. Such + schemas are supposed to be referenced by other schemas, which then use + 'unevaluatedProperties: false'. Typically bus or common-part schemas. + examples Optional. A list of one or more DTS hunks implementing the binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead. From 2ff94f7ce292a77e77965919d7dccb7ac04a88f5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 12 Feb 2024 16:05:24 +0100 Subject: [PATCH 25/56] docs: dt: writing-schema: document expectations on example DTS Devicetree binding maintainers expect the example DTS in a binding to show the usage of only this one particular binding, without unrelated device nodes. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240212150524.81819-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/writing-schema.rst | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst index a35859f3be00..7e71cdd1d6de 100644 --- a/Documentation/devicetree/bindings/writing-schema.rst +++ b/Documentation/devicetree/bindings/writing-schema.rst @@ -92,8 +92,10 @@ additionalProperties / unevaluatedProperties 'unevaluatedProperties: false'. Typically bus or common-part schemas. examples - Optional. A list of one or more DTS hunks implementing the - binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead. + Optional. A list of one or more DTS hunks implementing this binding only. + Example should not contain unrelated device nodes, e.g. consumer nodes in a + provider binding, other nodes referenced by phandle. + Note: YAML doesn't allow leading tabs, so spaces must be used instead. Unless noted otherwise, all properties are required. From 392703b6a18bbecbb2ae652619a705454f0fa0d6 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Tue, 13 Feb 2024 08:59:12 +0000 Subject: [PATCH 26/56] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Update interrupts All the RZ/G2L and alike SoC's (listed below) have ECCRAM0/1 interrupts supported by the IRQC block, reflect the same in DT binding doc. - R9A07G043U - RZ/G2UL - R9A07G044L/R9A07G044LC - RZ/{G2L,G2LC} - R9A07G054 - RZ/V2L - R9A08G045 - RZ/G3S For the RZ/G3S SoC ("R9A08G045") ECCRAM0/1 interrupts combined into single interrupt so we just use the below to represent them: - ec7tie1-0 - ec7tie2-0 - ec7tiovf-0 Previously, it was assumed that BUS-error and ECCRAM0/1 error interrupts were only supported by RZ/G2UL ("R9A07G043U") and RZ/G3S ("R9A08G045") SoCs. However, in reality, all RZ/G2L and similar SoCs (listed above) support these interrupts. Therefore, mark the 'interrupt-names' property as required for all the SoCs and update the example node in the binding document. Fixes: 96fed779d3d4 ("dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller") Fixes: 1cf0697a24ef ("dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S") Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213085912.56600-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Rob Herring --- .../renesas,rzg2l-irqc.yaml | 44 +++++++++++++++---- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml index d3b5aec0a3f7..daef4ee06f4e 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml @@ -44,7 +44,7 @@ properties: maxItems: 1 interrupts: - minItems: 41 + minItems: 45 items: - description: NMI interrupt - description: IRQ0 interrupt @@ -88,9 +88,15 @@ properties: - description: GPIO interrupt, TINT30 - description: GPIO interrupt, TINT31 - description: Bus error interrupt + - description: ECCRAM0 or combined ECCRAM0/1 1bit error interrupt + - description: ECCRAM0 or combined ECCRAM0/1 2bit error interrupt + - description: ECCRAM0 or combined ECCRAM0/1 error overflow interrupt + - description: ECCRAM1 1bit error interrupt + - description: ECCRAM1 2bit error interrupt + - description: ECCRAM1 error overflow interrupt interrupt-names: - minItems: 41 + minItems: 45 items: - const: nmi - const: irq0 @@ -134,6 +140,12 @@ properties: - const: tint30 - const: tint31 - const: bus-err + - const: ec7tie1-0 + - const: ec7tie2-0 + - const: ec7tiovf-0 + - const: ec7tie1-1 + - const: ec7tie2-1 + - const: ec7tiovf-1 clocks: maxItems: 2 @@ -156,6 +168,7 @@ required: - interrupt-controller - reg - interrupts + - interrupt-names - clocks - clock-names - power-domains @@ -169,16 +182,19 @@ allOf: compatible: contains: enum: - - renesas,r9a07g043u-irqc - renesas,r9a08g045-irqc then: properties: interrupts: - minItems: 42 + maxItems: 45 interrupt-names: - minItems: 42 - required: - - interrupt-names + maxItems: 45 + else: + properties: + interrupts: + minItems: 48 + interrupt-names: + minItems: 48 unevaluatedProperties: false @@ -233,7 +249,14 @@ examples: , , , - ; + , + , + , + , + , + , + , + ; interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3", "irq4", "irq5", "irq6", "irq7", @@ -244,7 +267,10 @@ examples: "tint16", "tint17", "tint18", "tint19", "tint20", "tint21", "tint22", "tint23", "tint24", "tint25", "tint26", "tint27", - "tint28", "tint29", "tint30", "tint31"; + "tint28", "tint29", "tint30", "tint31", + "bus-err", "ec7tie1-0", "ec7tie2-0", + "ec7tiovf-0", "ec7tie1-1", "ec7tie2-1", + "ec7tiovf-1"; clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>, <&cpg CPG_MOD R9A07G044_IA55_PCLK>; clock-names = "clk", "pclk"; From 77bbd20f80f4bcd0681c9f5345357b7e9a750f7e Mon Sep 17 00:00:00 2001 From: Dharma Balasubiramani Date: Fri, 2 Feb 2024 05:47:31 +0530 Subject: [PATCH 27/56] dt-bindings: display: convert Atmel's HLCDC to DT schema Convert the existing DT binding to DT schema of the Atmel's HLCDC display controller. Signed-off-by: Dharma Balasubiramani Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240202001733.91455-2-dharma.b@microchip.com Signed-off-by: Rob Herring --- .../atmel/atmel,hlcdc-display-controller.yaml | 63 ++++++++++++++++ .../bindings/display/atmel/hlcdc-dc.txt | 75 ------------------- 2 files changed, 63 insertions(+), 75 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/atmel/atmel,hlcdc-display-controller.yaml delete mode 100644 Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt diff --git a/Documentation/devicetree/bindings/display/atmel/atmel,hlcdc-display-controller.yaml b/Documentation/devicetree/bindings/display/atmel/atmel,hlcdc-display-controller.yaml new file mode 100644 index 000000000000..29ed42485de3 --- /dev/null +++ b/Documentation/devicetree/bindings/display/atmel/atmel,hlcdc-display-controller.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/atmel/atmel,hlcdc-display-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel's High LCD Controller (HLCDC) + +maintainers: + - Nicolas Ferre + - Alexandre Belloni + - Claudiu Beznea + +description: + The LCD Controller (LCDC) consists of logic for transferring LCD image + data from an external display buffer to a TFT LCD panel. The LCDC has one + display input buffer per layer that fetches pixels through the single bus + host interface and a look-up table to allow palletized display + configurations. + +properties: + compatible: + const: atmel,hlcdc-display-controller + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Output endpoint of the controller, connecting the LCD panel signals. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + reg: + maxItems: 1 + + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + description: + Endpoint connecting the LCD panel signals. + + properties: + bus-width: + enum: [ 12, 16, 18, 24 ] + +required: + - '#address-cells' + - '#size-cells' + - compatible + - port@0 + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt b/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt deleted file mode 100644 index 923aea25344c..000000000000 --- a/Documentation/devicetree/bindings/display/atmel/hlcdc-dc.txt +++ /dev/null @@ -1,75 +0,0 @@ -Device-Tree bindings for Atmel's HLCDC (High LCD Controller) DRM driver - -The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device. -See ../../mfd/atmel-hlcdc.txt for more details. - -Required properties: - - compatible: value should be "atmel,hlcdc-display-controller" - - pinctrl-names: the pin control state names. Should contain "default". - - pinctrl-0: should contain the default pinctrl states. - - #address-cells: should be set to 1. - - #size-cells: should be set to 0. - -Required children nodes: - Children nodes are encoding available output ports and their connections - to external devices using the OF graph representation (see ../graph.txt). - At least one port node is required. - -Optional properties in grandchild nodes: - Any endpoint grandchild node may specify a desired video interface - according to ../../media/video-interfaces.txt, specifically - - bus-width: recognized values are <12>, <16>, <18> and <24>, and - override any output mode selection heuristic, forcing "rgb444", - "rgb565", "rgb666" and "rgb888" respectively. - -Example: - - hlcdc: hlcdc@f0030000 { - compatible = "atmel,sama5d3-hlcdc"; - reg = <0xf0030000 0x2000>; - interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; - clock-names = "periph_clk","sys_clk", "slow_clk"; - - hlcdc-display-controller { - compatible = "atmel,hlcdc-display-controller"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - hlcdc_panel_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; - }; - }; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; - }; - -Example 2: With a video interface override to force rgb565; as above -but with these changes/additions: - - &hlcdc { - hlcdc-display-controller { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>; - - port@0 { - hlcdc_panel_output: endpoint@0 { - bus-width = <16>; - }; - }; - }; - }; From 08a5b9fe771455b94a0642ed4b4f462e1119bd90 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 15 Feb 2024 20:58:29 -0600 Subject: [PATCH 28/56] dt-bindings: vendor-prefixes: Add missing prefixes used in compatibles A new check for vendor-prefixes used in compatibles finds some missing ones. Add the missing ones already in use. This omits some ancient prefixes in powerpc and arm32 as there are a bunch of out of business one-offs that take too much time to track down who they were. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240216025839.902288-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/vendor-prefixes.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 71e37cea8689..b5c8d385ac62 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -230,6 +230,8 @@ patternProperties: description: ByteDance Ltd. "^calamp,.*": description: CalAmp Corp. + "^calao,.*": + description: CALAO Systems SAS "^calaosystems,.*": description: CALAO Systems SAS "^calxeda,.*": @@ -478,6 +480,9 @@ patternProperties: description: EZchip Semiconductor "^facebook,.*": description: Facebook + "^fairchild,.*": + description: Fairchild Semiconductor (deprecated, use 'onnn') + deprecated: true "^fairphone,.*": description: Fairphone B.V. "^faraday,.*": @@ -542,6 +547,8 @@ patternProperties: description: Giantec Semiconductor, Inc. "^giantplus,.*": description: Giantplus Technology Co., Ltd. + "^glinet,.*": + description: GL Intelligence, Inc. "^globalscale,.*": description: Globalscale Technologies, Inc. "^globaltop,.*": @@ -601,6 +608,8 @@ patternProperties: description: Honestar Technologies Co., Ltd. "^honeywell,.*": description: Honeywell + "^hoperf,.*": + description: Shenzhen Hope Microelectronics Co., Ltd. "^hoperun,.*": description: Jiangsu HopeRun Software Co., Ltd. "^hp,.*": @@ -631,12 +640,16 @@ patternProperties: description: Hyundai Technology "^i2se,.*": description: I2SE GmbH + "^IBM,.*": + description: International Business Machines (IBM) "^ibm,.*": description: International Business Machines (IBM) "^icplus,.*": description: IC Plus Corp. "^idt,.*": description: Integrated Device Technologies, Inc. + "^iei,.*": + description: IEI Integration Corp. "^ifi,.*": description: Ingenieurburo Fur Ic-Technologie (I/F/I) "^ilitek,.*": @@ -821,6 +834,8 @@ patternProperties: description: LSI Corp. (LSI Logic) "^lunzn,.*": description: Shenzhen Lunzn Technology Co., Ltd. + "^luxul,.*": + description: Lagrand | AV "^lwn,.*": description: Liebherr-Werk Nenzing GmbH "^lxa,.*": @@ -899,6 +914,9 @@ patternProperties: description: Miniand Tech "^minix,.*": description: MINIX Technology Ltd. + "^mips,.*": + description: MIPS Technology (deprecated, use 'mti' or 'img') + deprecated: true "^miramems,.*": description: MiraMEMS Sensing Technology Co., Ltd. "^mitsubishi,.*": @@ -993,6 +1011,9 @@ patternProperties: description: Novatek "^novtech,.*": description: NovTech, Inc. + "^numonyx,.*": + description: Numonyx (deprecated, use micron) + deprecated: true "^nutsboard,.*": description: NutsBoard "^nuvoton,.*": @@ -1538,8 +1559,12 @@ patternProperties: description: Voipac Technologies s.r.o. "^vot,.*": description: Vision Optical Technology Co., Ltd. + "^vscom,.*": + description: VS Visions Systems GmbH "^vxt,.*": description: VXT Ltd + "^wacom,.*": + description: Wacom "^wanchanglong,.*": description: Wanchanglong Electronics Technology（SHENZHEN）Co.，Ltd. "^wand,.*": From 1447c13051c7ed6f43a73eeee8e26280c4016e5d Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 24 Feb 2024 22:29:38 +0100 Subject: [PATCH 29/56] dt-bindings: lcdif: Do not require power-domains for i.MX6ULL i.MX6UL(L) uses "fsl,imx6sx-lcdif" as fallback compatible string, but has only very lightweight DISPLAY power domain. Its DISPLAY power domain is not supported by the binding / Linux kernel at the moment. Since the current setup is working, let's remove the power-domain from being required for that platform to fix the warning printed by CHECK_DTBS=y. Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL power-domains property") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Reviewed-by: Fabio Estevam Link: https://lore.kernel.org/r/20240224213240.1854709-7-sre@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml index 1c2be8d6f633..0681fc49aa1b 100644 --- a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml +++ b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml @@ -120,13 +120,19 @@ allOf: maxItems: 1 clock-names: maxItems: 1 + - if: + properties: + compatible: + const: fsl,imx6sx-lcdif + then: + required: + - power-domains - if: properties: compatible: contains: enum: - fsl,imx6sl-lcdif - - fsl,imx6sx-lcdif - fsl,imx8mm-lcdif - fsl,imx8mn-lcdif - fsl,imx8mp-lcdif From 336157be7e93394901a8752354562449fcd3ee0f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 22 Feb 2024 16:31:20 +0100 Subject: [PATCH 30/56] of/platform: Inform about created platform devices using pr_debug() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For most nodes with a compatible property a platform device is created. For some an amba device is created instead. For the latter of_amba_device_create() emits a message at debug level about the node the device is created from. Add a similar message to of_platform_device_create_pdata() to inform about the whole list of created devices. This also gives the right context for the following messages that inform about created child devices. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20240222153119.2026363-2-u.kleine-koenig@pengutronix.de Signed-off-by: Rob Herring --- drivers/of/platform.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/of/platform.c b/drivers/of/platform.c index b7708a06dc78..ba964df6b6db 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -166,6 +166,8 @@ static struct platform_device *of_platform_device_create_pdata( { struct platform_device *dev; + pr_debug("create platform device: %pOF\n", np); + if (!of_device_is_available(np) || of_node_test_and_set_flag(np, OF_POPULATED)) return NULL; From 1238913f24c479cbcfb68040f0a9c7d699525db2 Mon Sep 17 00:00:00 2001 From: Jeffrey Hugo Date: Fri, 23 Feb 2024 09:14:55 -0700 Subject: [PATCH 31/56] dt-bindings: watchdog: qcom-wdt: Update maintainer to Rajendra Nayak The servers for the @codeaurora domain are long retired and any messages sent there will bounce. Sai has left the company and appears no longer active in the community which leaves this binding orphaned. Rajendra Nayak has volunteered to take over as maintainer. Signed-off-by: Jeffrey Hugo Reviewed-by: Guenter Roeck Acked-by: Rajendra Nayak Link: https://lore.kernel.org/r/20240223161455.4009469-1-quic_jhugo@quicinc.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index a4f35c598cdb..47587971fb0b 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer maintainers: - - Sai Prakash Ranjan + - Rajendra Nayak properties: $nodename: From 75b737693bd9511a3b79cd8bd10c3af871dca5ec Mon Sep 17 00:00:00 2001 From: Stanislav Jakubek Date: Sat, 17 Feb 2024 15:17:15 +0100 Subject: [PATCH 32/56] dt-bindings: watchdog: drop obsolete brcm,bcm2835-pm-wdt bindings These bindings are already (better) described in soc/bcm/brcm,bcm2835-pm.yaml. Drop these obsolete bindings. Signed-off-by: Stanislav Jakubek Acked-by: Conor Dooley Link: https://lore.kernel.org/r/ZdC/624d1c8O3NRG@standask-GA-A55M-S2HP Signed-off-by: Rob Herring --- .../bindings/watchdog/brcm,bcm2835-pm-wdog.txt | 18 ------------------ 1 file changed, 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt diff --git a/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt b/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt deleted file mode 100644 index f801d71de1cd..000000000000 --- a/Documentation/devicetree/bindings/watchdog/brcm,bcm2835-pm-wdog.txt +++ /dev/null @@ -1,18 +0,0 @@ -BCM2835 Watchdog timer - -Required properties: - -- compatible : should be "brcm,bcm2835-pm-wdt" -- reg : Specifies base physical address and size of the registers. - -Optional properties: - -- timeout-sec : Contains the watchdog timeout in seconds - -Example: - -watchdog { - compatible = "brcm,bcm2835-pm-wdt"; - reg = <0x7e100000 0x28>; - timeout-sec = <10>; -}; From 835e4cce453f34f323911a836eb669be2d01889d Mon Sep 17 00:00:00 2001 From: Jeffrey Hugo Date: Fri, 23 Feb 2024 09:20:27 -0700 Subject: [PATCH 33/56] dt-bindings: net: bluetooth: qualcomm: Fix bouncing @codeaurora The servers for the @codeaurora domain are long retired and any messages sent there will bounce. Update the maintainer addresses for this binding to match the entries in .mailmap so that anyone looking in the file for a contact will see a correct address. Signed-off-by: Jeffrey Hugo Link: https://lore.kernel.org/r/20240223162027.4016065-1-quic_jhugo@quicinc.com Signed-off-by: Rob Herring --- .../devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml index eba2f3026ab0..528ef3572b62 100644 --- a/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml +++ b/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Bluetooth Chips maintainers: - - Balakrishna Godavarthi - - Rocky Liao + - Balakrishna Godavarthi + - Rocky Liao description: This binding describes Qualcomm UART-attached bluetooth chips. From abc6b0269197e824deeff3fccb79d84a6a330a1f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 24 Feb 2024 09:44:14 +0100 Subject: [PATCH 34/56] dt-bindings: arm: syna: remove unstable remark Marvell Berlin SoCs (later Syna) bindings were marked as work-in-progress / unstable in 2015 in commit f07b4e49d27e ("Documentation: bindings: berlin: consider our dt bindings as unstable"). Almost nine years is enough, so drop the "unstable" remark and expect usual ABI rules. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240224084414.6264-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/syna.txt | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/syna.txt b/Documentation/devicetree/bindings/arm/syna.txt index 851f48ead927..f53c430f648c 100644 --- a/Documentation/devicetree/bindings/arm/syna.txt +++ b/Documentation/devicetree/bindings/arm/syna.txt @@ -6,18 +6,6 @@ berlin SoCs are now Synaptics' SoCs now. --------------------------------------------------------------- -Work in progress statement: - -Device tree files and bindings applying to Marvell Berlin SoCs and boards are -considered "unstable". Any Marvell Berlin device tree binding may change at any -time. Be sure to use a device tree binary and a kernel image generated from the -same source tree. - -Please refer to Documentation/devicetree/bindings/ABI.rst for a definition of a -stable binding/ABI. - ---------------------------------------------------------------- - Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 shall have the following properties: From c583953557888459cd6419cc1fd5dfcc8df5ddc3 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 22 Feb 2024 10:43:42 -0700 Subject: [PATCH 35/56] dt-bindings: i2c: Remove obsolete i2c.txt Everything in i2c.txt is covered by schemas/i2c/i2c-controller.yaml in dtschema project, so remove i2c.txt and update links to it in the tree. Reviewed-by: Wolfram Sang Acked-by: Mark Brown Link: https://lore.kernel.org/r/20240222174343.3482354-2-robh@kernel.org Signed-off-by: Rob Herring --- .../bindings/gpio/gateworks,pld-gpio.txt | 3 +- Documentation/devicetree/bindings/i2c/i2c.txt | 151 ------------------ .../i2c/nvidia,tegra186-bpmp-i2c.yaml | 3 +- .../devicetree/bindings/i3c/i3c.yaml | 2 +- .../devicetree/bindings/sound/cs4341.txt | 2 +- MAINTAINERS | 1 - 6 files changed, 4 insertions(+), 158 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c.txt diff --git a/Documentation/devicetree/bindings/gpio/gateworks,pld-gpio.txt b/Documentation/devicetree/bindings/gpio/gateworks,pld-gpio.txt index 6e81f8b755c5..d543fd1b8b23 100644 --- a/Documentation/devicetree/bindings/gpio/gateworks,pld-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gateworks,pld-gpio.txt @@ -1,7 +1,6 @@ Gateworks PLD GPIO controller bindings -The GPIO controller should be a child node on an I2C bus, -see: i2c/i2c.txt for details. +The GPIO controller should be a child node on an I2C bus. Required properties: - compatible: Should be "gateworks,pld-gpio" diff --git a/Documentation/devicetree/bindings/i2c/i2c.txt b/Documentation/devicetree/bindings/i2c/i2c.txt deleted file mode 100644 index fc3dd7ec0445..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c.txt +++ /dev/null @@ -1,151 +0,0 @@ -Generic device tree bindings for I2C busses -=========================================== - -This document describes generic bindings which can be used to describe I2C -busses and their child devices in a device tree. - -Required properties (per bus) ------------------------------ - -- #address-cells - should be <1>. Read more about addresses below. -- #size-cells - should be <0>. -- compatible - name of I2C bus controller - -For other required properties e.g. to describe register sets, -clocks, etc. check the binding documentation of the specific driver. - -The cells properties above define that an address of children of an I2C bus -are described by a single value. - -Optional properties (per bus) ------------------------------ - -These properties may not be supported by all drivers. However, if a driver -wants to support one of the below features, it should adapt these bindings. - -- clock-frequency - frequency of bus clock in Hz. - -- i2c-bus - For I2C adapters that have child nodes that are a mixture of both I2C - devices and non-I2C devices, the 'i2c-bus' subnode can be used for - populating I2C devices. If the 'i2c-bus' subnode is present, only - subnodes of this will be considered as I2C slaves. The properties, - '#address-cells' and '#size-cells' must be defined under this subnode - if present. - -- i2c-scl-falling-time-ns - Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C - specification. - -- i2c-scl-internal-delay-ns - Number of nanoseconds the IP core additionally needs to setup SCL. - -- i2c-scl-rising-time-ns - Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C - specification. - -- i2c-sda-falling-time-ns - Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C - specification. - -- i2c-analog-filter - Enable analog filter for i2c lines. - -- i2c-digital-filter - Enable digital filter for i2c lines. - -- i2c-digital-filter-width-ns - Width of spikes which can be filtered by digital filter - (i2c-digital-filter). This width is specified in nanoseconds. - -- i2c-analog-filter-cutoff-frequency - Frequency that the analog filter (i2c-analog-filter) uses to distinguish - which signal to filter. Signal with higher frequency than specified will - be filtered out. Only lower frequency will pass (this is applicable to - a low-pass analog filter). Typical value should be above the normal - i2c bus clock frequency (clock-frequency). - Specified in Hz. - -- multi-master - states that there is another master active on this bus. The OS can use - this information to adapt power management to keep the arbitration awake - all the time, for example. Can not be combined with 'single-master'. - -- pinctrl - add extra pinctrl to configure SCL/SDA pins to GPIO function for bus - recovery, call it "gpio" or "recovery" (deprecated) state - -- scl-gpios - specify the gpio related to SCL pin. Used for GPIO bus recovery. - -- sda-gpios - specify the gpio related to SDA pin. Optional for GPIO bus recovery. - -- single-master - states that there is no other master active on this bus. The OS can use - this information to detect a stalled bus more reliably, for example. - Can not be combined with 'multi-master'. - -- smbus - states that additional SMBus restrictions and features apply to this bus. - An example of feature is SMBusHostNotify. Examples of restrictions are - more reserved addresses and timeout definitions. - -- smbus-alert - states that the optional SMBus-Alert feature apply to this bus. - -- mctp-controller - indicates that the system is accessible via this bus as an endpoint for - MCTP over I2C transport. - -Required properties (per child device) --------------------------------------- - -- compatible - name of I2C slave device - -- reg - One or many I2C slave addresses. These are usually a 7 bit addresses. - However, flags can be attached to an address. I2C_TEN_BIT_ADDRESS is - used to mark a 10 bit address. It is needed to avoid the ambiguity - between e.g. a 7 bit address of 0x50 and a 10 bit address of 0x050 - which, in theory, can be on the same bus. - Another flag is I2C_OWN_SLAVE_ADDRESS to mark addresses on which we - listen to be devices ourselves. - -Optional properties (per child device) --------------------------------------- - -These properties may not be supported by all drivers. However, if a driver -wants to support one of the below features, it should adapt these bindings. - -- host-notify - device uses SMBus host notify protocol instead of interrupt line. - -- interrupts - interrupts used by the device. - -- interrupt-names - "irq", "wakeup" and "smbus_alert" names are recognized by I2C core, - other names are left to individual drivers. - -- reg-names - Names of map programmable addresses. - It can contain any map needing another address than default one. - -- wakeup-source - device can be used as a wakeup source. - -Binding may contain optional "interrupts" property, describing interrupts -used by the device. I2C core will assign "irq" interrupt (or the very first -interrupt if not using interrupt names) as primary interrupt for the slave. - -Alternatively, devices supporting SMBus Host Notify, and connected to -adapters that support this feature, may use "host-notify" property. I2C -core will create a virtual interrupt for Host Notify and assign it as -primary interrupt for the slave. - -Also, if device is marked as a wakeup source, I2C core will set up "wakeup" -interrupt for the device. If "wakeup" interrupt name is not present in the -binding, then primary interrupt will be used as wakeup interrupt. diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.yaml index b8319dcf3d8a..8676335e9e94 100644 --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra186-bpmp-i2c.yaml @@ -21,8 +21,7 @@ description: | See ../firmware/nvidia,tegra186-bpmp.yaml for details of the BPMP binding. - This node represents an I2C controller. See ../i2c/i2c.txt for details - of the core I2C binding. + This node represents an I2C controller. properties: compatible: diff --git a/Documentation/devicetree/bindings/i3c/i3c.yaml b/Documentation/devicetree/bindings/i3c/i3c.yaml index c816e295d565..87cadbcdc61c 100644 --- a/Documentation/devicetree/bindings/i3c/i3c.yaml +++ b/Documentation/devicetree/bindings/i3c/i3c.yaml @@ -71,7 +71,7 @@ patternProperties: description: | I2C child, should be named: @ - All properties described in Documentation/devicetree/bindings/i2c/i2c.txt + All properties described in dtschema schemas/i2c/i2c-controller.yaml are valid here, except the reg property whose content is changed. properties: diff --git a/Documentation/devicetree/bindings/sound/cs4341.txt b/Documentation/devicetree/bindings/sound/cs4341.txt index 12b4aa8ef0db..c1d5c8ad1a36 100644 --- a/Documentation/devicetree/bindings/sound/cs4341.txt +++ b/Documentation/devicetree/bindings/sound/cs4341.txt @@ -9,7 +9,7 @@ Required properties: number for SPI. For required properties on I2C-bus, please consult -Documentation/devicetree/bindings/i2c/i2c.txt +dtschema schemas/i2c/i2c-controller.yaml For required properties on SPI-bus, please consult Documentation/devicetree/bindings/spi/spi-bus.txt diff --git a/MAINTAINERS b/MAINTAINERS index 45c6c13b4edf..50a906eb8dfd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10074,7 +10074,6 @@ S: Maintained W: https://i2c.wiki.kernel.org/ Q: https://patchwork.ozlabs.org/project/linux-i2c/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git -F: Documentation/devicetree/bindings/i2c/i2c.txt F: Documentation/i2c/ F: drivers/i2c/* F: include/dt-bindings/i2c/i2c.h From aaef9cdc4bdcf45db729a4ce7ebf3fda3336e092 Mon Sep 17 00:00:00 2001 From: Dharma Balasubiramani Date: Thu, 22 Feb 2024 14:37:38 +0530 Subject: [PATCH 36/56] dt-bindings: interrupt-controller: Convert Atmel AIC to json-schema Convert the Atmel AIC binding document to DT schema format using json-schema. Signed-off-by: Dharma Balasubiramani Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240222090738.41628-1-dharma.b@microchip.com Signed-off-by: Rob Herring --- .../interrupt-controller/atmel,aic.txt | 43 --------- .../interrupt-controller/atmel,aic.yaml | 89 +++++++++++++++++++ 2 files changed, 89 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt deleted file mode 100644 index 7079d44bf3ba..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt +++ /dev/null @@ -1,43 +0,0 @@ -* Advanced Interrupt Controller (AIC) - -Required properties: -- compatible: Should be: - - "atmel,-aic" where can be "at91rm9200", "sama5d2", - "sama5d3" or "sama5d4" - - "microchip,-aic" where can be "sam9x60" - -- interrupt-controller: Identifies the node as an interrupt controller. -- #interrupt-cells: The number of cells to define the interrupts. It should be 3. - The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). - The second cell is used to specify flags: - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. - Valid combinations are 1, 2, 3, 4, 8. - Default flag for internal sources should be set to 4 (active high). - The third cell is used to specify the irq priority from 0 (lowest) to 7 - (highest). -- reg: Should contain AIC registers location and length -- atmel,external-irqs: u32 array of external irqs. - -Examples: - /* - * AIC - */ - aic: interrupt-controller@fffff000 { - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0xfffff000 0x200>; - }; - - /* - * An interrupt generating device that is wired to an AIC. - */ - dma: dma-controller@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; - interrupts = <21 4 5>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml new file mode 100644 index 000000000000..d4658fe3867c --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/atmel,aic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Advanced Interrupt Controller (AIC) + +maintainers: + - Nicolas Ferre + - Dharma balasubiramani + +description: + The Advanced Interrupt Controller (AIC) is an 8-level priority, individually + maskable, vectored interrupt controller providing handling of up to one + hundred and twenty-eight interrupt sources. + +properties: + compatible: + enum: + - atmel,at91rm9200-aic + - atmel,sama5d2-aic + - atmel,sama5d3-aic + - atmel,sama5d4-aic + - microchip,sam9x60-aic + + reg: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 3 + description: | + The 1st cell is the IRQ number (Peripheral IDentifier on datasheet). + The 2nd cell specifies flags: + bits[3:0] trigger type and level flags: + 1 = low-to-high edge triggered. + 2 = high-to-low edge triggered. + 4 = active high level-sensitive. + 8 = active low level-sensitive. + Valid combinations: 1, 2, 3, 4, 8. + Default for internal sources: 4 (active high). + The 3rd cell specifies irq priority from 0 (lowest) to 7 (highest). + + interrupts: + maxItems: 1 + + atmel,external-irqs: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: u32 array of external irqs. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + - if: + properties: + compatible: + contains: + const: atmel,at91rm9200-aic + then: + properties: + atmel,external-irqs: + minItems: 1 + maxItems: 7 + else: + properties: + atmel,external-irqs: + minItems: 1 + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + - atmel,external-irqs + +unevaluatedProperties: false + +examples: + - | + interrupt-controller@fffff000 { + compatible = "atmel,at91rm9200-aic"; + reg = <0xfffff000 0x200>; + interrupt-controller; + #interrupt-cells = <3>; + atmel,external-irqs = <31>; + }; +... From ad8ee969d7e34dd310a618d798cc6d8fe4f04464 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Sun, 3 Mar 2024 11:48:53 +0100 Subject: [PATCH 37/56] of: make for_each_property_of_node() available to to !OF for_each_property_of_node() is a macro and so doesn't have a stub inline function for !OF. Move it out of the relevant #ifdef to make it available to all users. Fixes: 611cad720148 ("dt: add of_alias_scan and of_alias_get_id") Signed-off-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20240303104853.31511-1-brgl@bgdev.pl Signed-off-by: Rob Herring --- include/linux/of.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/linux/of.h b/include/linux/of.h index 6a9ddf20e79a..a3e8e429ad7f 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -362,9 +362,6 @@ extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, int index); extern u64 of_get_cpu_hwid(struct device_node *cpun, unsigned int thread); -#define for_each_property_of_node(dn, pp) \ - for (pp = dn->properties; pp != NULL; pp = pp->next) - extern int of_n_addr_cells(struct device_node *np); extern int of_n_size_cells(struct device_node *np); extern const struct of_device_id *of_match_node( @@ -892,6 +889,9 @@ static inline int of_prop_val_eq(struct property *p1, struct property *p2) !memcmp(p1->value, p2->value, (size_t)p1->length); } +#define for_each_property_of_node(dn, pp) \ + for (pp = dn->properties; pp != NULL; pp = pp->next) + #if defined(CONFIG_OF) && defined(CONFIG_NUMA) extern int of_node_to_nid(struct device_node *np); #else From 7cfc8db2c0cc1f79a979a159f0f56bcf25256e81 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 26 Feb 2024 22:26:23 +0100 Subject: [PATCH 38/56] dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML Convert i.MX6UL pinctrl bindings to YAML. Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20240226212740.2019837-2-sre@kernel.org Signed-off-by: Rob Herring --- .../bindings/pinctrl/fsl,imx6ul-pinctrl.txt | 37 ------ .../bindings/pinctrl/fsl,imx6ul-pinctrl.yaml | 116 ++++++++++++++++++ 2 files changed, 116 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt deleted file mode 100644 index 7ca4f6118d9a..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX6 UltraLite IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt in this directory for common binding part -and usage. - -Required properties: -- compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or - "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can be found in - imx6ul-pinfunc.h under device tree source folder. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX6 UltraLite - Reference Manual for detailed CONFIG settings. - -CONFIG bits definition: -PAD_CTL_HYS (1 << 16) -PAD_CTL_PUS_100K_DOWN (0 << 14) -PAD_CTL_PUS_47K_UP (1 << 14) -PAD_CTL_PUS_100K_UP (2 << 14) -PAD_CTL_PUS_22K_UP (3 << 14) -PAD_CTL_PUE (1 << 13) -PAD_CTL_PKE (1 << 12) -PAD_CTL_ODE (1 << 11) -PAD_CTL_SPEED_LOW (0 << 6) -PAD_CTL_SPEED_MED (1 << 6) -PAD_CTL_SPEED_HIGH (3 << 6) -PAD_CTL_DSE_DISABLE (0 << 3) -PAD_CTL_DSE_260ohm (1 << 3) -PAD_CTL_DSE_130ohm (2 << 3) -PAD_CTL_DSE_87ohm (3 << 3) -PAD_CTL_DSE_65ohm (4 << 3) -PAD_CTL_DSE_52ohm (5 << 3) -PAD_CTL_DSE_43ohm (6 << 3) -PAD_CTL_DSE_37ohm (7 << 3) -PAD_CTL_SRE_FAST (1 << 0) -PAD_CTL_SRE_SLOW (0 << 0) diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml new file mode 100644 index 000000000000..906b264a9e3c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX6UL IOMUX Controller + +maintainers: + - Dong Aisheng + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +allOf: + - $ref: pinctrl.yaml# + +properties: + compatible: + enum: + - fsl,imx6ul-iomuxc + - fsl,imx6ull-iomuxc-snvs + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro, which can + be found in . The last integer + CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX6UL Reference Manual for detailed CONFIG settings. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: | + "mux_reg" indicates the offset of mux register. + - description: | + "conf_reg" indicates the offset of pad configuration register. + - description: | + "input_reg" indicates the offset of select input register. + - description: | + "mux_val" indicates the mux value to be applied. + - description: | + "input_val" indicates the select input value to be applied. + - description: | + "pad_setting" indicates the pad configuration value to be applied: + PAD_CTL_HYS (1 << 16) + PAD_CTL_PUS_100K_DOWN (0 << 14) + PAD_CTL_PUS_47K_UP (1 << 14) + PAD_CTL_PUS_100K_UP (2 << 14) + PAD_CTL_PUS_22K_UP (3 << 14) + PAD_CTL_PUE (1 << 13) + PAD_CTL_PKE (1 << 12) + PAD_CTL_ODE (1 << 11) + PAD_CTL_SPEED_LOW (0 << 6) + PAD_CTL_SPEED_MED (1 << 6) + PAD_CTL_SPEED_HIGH (3 << 6) + PAD_CTL_DSE_DISABLE (0 << 3) + PAD_CTL_DSE_260ohm (1 << 3) + PAD_CTL_DSE_130ohm (2 << 3) + PAD_CTL_DSE_87ohm (3 << 3) + PAD_CTL_DSE_65ohm (4 << 3) + PAD_CTL_DSE_52ohm (5 << 3) + PAD_CTL_DSE_43ohm (6 << 3) + PAD_CTL_DSE_37ohm (7 << 3) + PAD_CTL_SRE_FAST (1 << 0) + PAD_CTL_SRE_SLOW (0 << 0) + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + iomuxc: pinctrl@20e0000 { + compatible = "fsl,imx6ul-iomuxc"; + reg = <0x020e0000 0x4000>; + + mux_uart: uartgrp { + fsl,pins = < + 0x0084 0x0310 0x0000 0 0 0x1b0b1 + 0x0088 0x0314 0x0624 0 3 0x1b0b1 + >; + }; + }; + - | + iomuxc_snvs: pinctrl@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; + + pinctrl_snvs_usbc_det: snvsusbcdetgrp { + fsl,pins = < + 0x0010 0x0054 0x0000 0x5 0x0 0x130b0 + >; + }; + }; From b6376606971a604a3f6ef8a85e21a6aad85000eb Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 26 Feb 2024 22:26:24 +0100 Subject: [PATCH 39/56] dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML Convert the i.MX6UL touchscreen DT binding to YAML. Reviewed-by: Rob Herring Signed-off-by: Sebastian Reichel Acked-by: Dmitry Torokhov Link: https://lore.kernel.org/r/20240226212740.2019837-3-sre@kernel.org Signed-off-by: Rob Herring --- .../input/touchscreen/fsl,imx6ul-tsc.yaml | 97 +++++++++++++++++++ .../bindings/input/touchscreen/imx6ul_tsc.txt | 38 -------- 2 files changed, 97 insertions(+), 38 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml new file mode 100644 index 000000000000..678756ad0f92 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl,imx6ul-tsc.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx6ul-tsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX6UL Touch Controller + +maintainers: + - Haibo Chen + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + const: fsl,imx6ul-tsc + + reg: + items: + - description: touch controller address + - description: ADC2 address + + interrupts: + items: + - description: touch controller address + - description: ADC2 address + + clocks: + maxItems: 2 + + clock-names: + items: + - const: tsc + - const: adc + + xnur-gpios: + maxItems: 1 + description: + The X- gpio this controller connect to. This xnur-gpio returns to + low once the finger leave the touch screen (The last touch event + the touch controller capture). + + measure-delay-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The value of measure delay time. Before X-axis or Y-axis measurement, + the screen need some time before even potential distribution ready. + default: 0xffff + minimum: 0 + maximum: 0xffffff + + pre-charge-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The touch screen need some time to precharge. + default: 0xfff + minimum: 0 + maximum: 0xffffffff + + touchscreen-average-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of data samples which are averaged for each read. + enum: [ 1, 4, 8, 16, 32 ] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - xnur-gpios + +allOf: + - $ref: touchscreen.yaml# + +additionalProperties: false + +examples: + - | + #include + #include + #include + touchscreen@2040000 { + compatible = "fsl,imx6ul-tsc"; + reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; + interrupts = , + ; + clocks = <&clks IMX6UL_CLK_IPG>, + <&clks IMX6UL_CLK_ADC2>; + clock-names = "tsc", "adc"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xfff>; + pre-charge-time = <0xffff>; + touchscreen-average-samples = <32>; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt b/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt deleted file mode 100644 index 164915004424..000000000000 --- a/Documentation/devicetree/bindings/input/touchscreen/imx6ul_tsc.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Freescale i.MX6UL Touch Controller - -Required properties: -- compatible: must be "fsl,imx6ul-tsc". -- reg: this touch controller address and the ADC2 address. -- interrupts: the interrupt of this touch controller and ADC2. -- clocks: the root clock of touch controller and ADC2. -- clock-names; must be "tsc" and "adc". -- xnur-gpio: the X- gpio this controller connect to. - This xnur-gpio returns to low once the finger leave the touch screen (The - last touch event the touch controller capture). - -Optional properties: -- measure-delay-time: the value of measure delay time. - Before X-axis or Y-axis measurement, the screen need some time before - even potential distribution ready. - This value depends on the touch screen. -- pre-charge-time: the touch screen need some time to precharge. - This value depends on the touch screen. -- touchscreen-average-samples: Number of data samples which are averaged for - each read. Valid values are 1, 4, 8, 16 and 32. - -Example: - tsc: tsc@2040000 { - compatible = "fsl,imx6ul-tsc"; - reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts = , - ; - clocks = <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names = "tsc", "adc"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; - measure-delay-time = <0xfff>; - pre-charge-time = <0xffff>; - touchscreen-average-samples = <32>; - }; From 465c7756d1fffa2bae9f2c77498b1fcdd169d317 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 26 Feb 2024 22:26:25 +0100 Subject: [PATCH 40/56] dt-bindings: soc: imx: fsl,imx-anatop: add binding Add missing binding for i.MX anatop syscon. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20240226212740.2019837-4-sre@kernel.org Signed-off-by: Rob Herring --- .../bindings/soc/imx/fsl,imx-anatop.yaml | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml new file mode 100644 index 000000000000..5a59e3470510 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ANATOP register + +maintainers: + - Shawn Guo + - Sascha Hauer + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx6sl-anatop + - fsl,imx6sll-anatop + - fsl,imx6sx-anatop + - fsl,imx6ul-anatop + - fsl,imx7d-anatop + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + - items: + - const: fsl,imx6q-anatop + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + interrupts: + items: + - description: Temperature sensor event + - description: Brown-out event on either of the support regulators + - description: Brown-out event on either the core, gpu or soc regulators + + tempmon: + type: object + unevaluatedProperties: false + $ref: /schemas/thermal/imx-thermal.yaml + +patternProperties: + "regulator-((3p0)|(vddcore)|(vddsoc))$": + type: object + unevaluatedProperties: false + $ref: /schemas/regulator/anatop-regulator.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + anatop: anatop@20c8000 { + compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", + "syscon", "simple-mfd"; + reg = <0x020c8000 0x1000>; + interrupts = , + , + ; + + reg_3p0: regulator-3p0 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2625000>; + regulator-max-microvolt = <3400000>; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2625000>; + anatop-max-voltage = <3400000>; + anatop-enable-bit = <0>; + }; + + reg_arm: regulator-vddcore { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <24>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + reg_soc: regulator-vddsoc { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-delay-reg-offset = <0x170>; + anatop-delay-bit-shift = <28>; + anatop-delay-bit-width = <2>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + tempmon: tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent = <&gpc>; + interrupts = ; + fsl,tempmon = <&anatop>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; + clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells = <0>; + }; + }; From bd9cf5b11fd20e1c5774ef2d95023daf1b90f0c3 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 26 Feb 2024 22:26:26 +0100 Subject: [PATCH 41/56] dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6 Add compatibles used by different i.MX6 variants to the i.MX IOMUX Controller GPR binding. Acked-by: Rob Herring Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20240226212740.2019837-5-sre@kernel.org Signed-off-by: Rob Herring --- .../bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml index 1da1b758b4ae..8451cb4dd87c 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml @@ -17,7 +17,23 @@ properties: compatible: oneOf: - items: - - const: fsl,imx8mq-iomuxc-gpr + - enum: + - fsl,imx6q-iomuxc-gpr + - fsl,imx8mq-iomuxc-gpr + - const: syscon + - const: simple-mfd + - items: + - enum: + - fsl,imx6sl-iomuxc-gpr + - fsl,imx6sll-iomuxc-gpr + - fsl,imx6ul-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr + - const: syscon + - items: + - enum: + - fsl,imx6sx-iomuxc-gpr + - fsl,imx7d-iomuxc-gpr + - const: fsl,imx6q-iomuxc-gpr - const: syscon - const: simple-mfd - items: From 4bfb270378c995773960fb0a8c908fc009607a1b Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 26 Feb 2024 22:26:27 +0100 Subject: [PATCH 42/56] dt-bindings: fsl-imx-sdma: fix HDMI audio index HDMI Audio has been added to the DT binding documentation with an incorrect index. DT and the driver use index 26. This happened, because the binding is missing MULTI_SAI type, which is using index 25. Reported-by: Michael Yackavage Fixes: 7bdbd87d4008 ("dt-bindings: fsl-imx-sdma: Convert imx sdma to DT schema") Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20240226212740.2019837-6-sre@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml index b95dd8db5a30..37135fa024f9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml @@ -92,7 +92,8 @@ properties: description: needs firmware more than ver 2 - Shared ASRC: 23 - SAI: 24 - - HDMI Audio: 25 + - Multi SAI: 25 + - HDMI Audio: 26 The third cell: transfer priority ID enum: From 3e62273ac63aeeb80bd3b24fa0102a4de9972d83 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 1 Feb 2024 13:29:30 -0600 Subject: [PATCH 43/56] soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage There is no reason to use RESERVEDMEM_OF_DECLARE() as the initialization hook just saves off the base address and size. Use of RESERVEDMEM_OF_DECLARE() is reserved for non-driver code and initialization which must be done early. For qbman, retrieving the address and size can be done in probe just as easily. Link: https://lore.kernel.org/r/20240201192931.1324130-1-robh@kernel.org Signed-off-by: Rob Herring --- drivers/soc/fsl/qbman/bman_ccsr.c | 27 ++--------- drivers/soc/fsl/qbman/dpaa_sys.c | 12 +++-- drivers/soc/fsl/qbman/dpaa_sys.h | 4 +- drivers/soc/fsl/qbman/qman_ccsr.c | 77 ++++++++++--------------------- 4 files changed, 40 insertions(+), 80 deletions(-) diff --git a/drivers/soc/fsl/qbman/bman_ccsr.c b/drivers/soc/fsl/qbman/bman_ccsr.c index cb24a08be084..b0f26f6f731e 100644 --- a/drivers/soc/fsl/qbman/bman_ccsr.c +++ b/drivers/soc/fsl/qbman/bman_ccsr.c @@ -144,17 +144,6 @@ static int bm_set_memory(u64 ba, u32 size) static dma_addr_t fbpr_a; static size_t fbpr_sz; -static int bman_fbpr(struct reserved_mem *rmem) -{ - fbpr_a = rmem->base; - fbpr_sz = rmem->size; - - WARN_ON(!(fbpr_a && fbpr_sz)); - - return 0; -} -RESERVEDMEM_OF_DECLARE(bman_fbpr, "fsl,bman-fbpr", bman_fbpr); - static irqreturn_t bman_isr(int irq, void *ptr) { u32 isr_val, ier_val, ecsr_val, isr_mask, i; @@ -242,17 +231,11 @@ static int fsl_bman_probe(struct platform_device *pdev) return -ENODEV; } - /* - * If FBPR memory wasn't defined using the qbman compatible string - * try using the of_reserved_mem_device method - */ - if (!fbpr_a) { - ret = qbman_init_private_mem(dev, 0, &fbpr_a, &fbpr_sz); - if (ret) { - dev_err(dev, "qbman_init_private_mem() failed 0x%x\n", - ret); - return -ENODEV; - } + ret = qbman_init_private_mem(dev, 0, "fsl,bman-fbpr", &fbpr_a, &fbpr_sz); + if (ret) { + dev_err(dev, "qbman_init_private_mem() failed 0x%x\n", + ret); + return -ENODEV; } dev_dbg(dev, "Allocated FBPR 0x%llx 0x%zx\n", fbpr_a, fbpr_sz); diff --git a/drivers/soc/fsl/qbman/dpaa_sys.c b/drivers/soc/fsl/qbman/dpaa_sys.c index 33751450047e..e1d7b79cc450 100644 --- a/drivers/soc/fsl/qbman/dpaa_sys.c +++ b/drivers/soc/fsl/qbman/dpaa_sys.c @@ -34,8 +34,8 @@ /* * Initialize a devices private memory region */ -int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr, - size_t *size) +int qbman_init_private_mem(struct device *dev, int idx, const char *compat, + dma_addr_t *addr, size_t *size) { struct device_node *mem_node; struct reserved_mem *rmem; @@ -44,8 +44,12 @@ int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr, mem_node = of_parse_phandle(dev->of_node, "memory-region", idx); if (!mem_node) { - dev_err(dev, "No memory-region found for index %d\n", idx); - return -ENODEV; + mem_node = of_find_compatible_node(NULL, NULL, compat); + if (!mem_node) { + dev_err(dev, "No memory-region found for index %d or compatible '%s'\n", + idx, compat); + return -ENODEV; + } } rmem = of_reserved_mem_lookup(mem_node); diff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h index ae8afa552b1e..16485bde9636 100644 --- a/drivers/soc/fsl/qbman/dpaa_sys.h +++ b/drivers/soc/fsl/qbman/dpaa_sys.h @@ -101,8 +101,8 @@ static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last) #define DPAA_GENALLOC_OFF 0x80000000 /* Initialize the devices private memory region */ -int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr, - size_t *size); +int qbman_init_private_mem(struct device *dev, int idx, const char *compat, + dma_addr_t *addr, size_t *size); /* memremap() attributes for different platforms */ #ifdef CONFIG_PPC diff --git a/drivers/soc/fsl/qbman/qman_ccsr.c b/drivers/soc/fsl/qbman/qman_ccsr.c index 157659fd033a..392e54f14dbe 100644 --- a/drivers/soc/fsl/qbman/qman_ccsr.c +++ b/drivers/soc/fsl/qbman/qman_ccsr.c @@ -468,28 +468,6 @@ static int zero_priv_mem(phys_addr_t addr, size_t sz) return 0; } - -static int qman_fqd(struct reserved_mem *rmem) -{ - fqd_a = rmem->base; - fqd_sz = rmem->size; - - WARN_ON(!(fqd_a && fqd_sz)); - return 0; -} -RESERVEDMEM_OF_DECLARE(qman_fqd, "fsl,qman-fqd", qman_fqd); - -static int qman_pfdr(struct reserved_mem *rmem) -{ - pfdr_a = rmem->base; - pfdr_sz = rmem->size; - - WARN_ON(!(pfdr_a && pfdr_sz)); - - return 0; -} -RESERVEDMEM_OF_DECLARE(qman_pfdr, "fsl,qman-pfdr", qman_pfdr); - #endif unsigned int qm_get_fqid_maxcnt(void) @@ -796,39 +774,34 @@ static int fsl_qman_probe(struct platform_device *pdev) qm_channel_caam = QMAN_CHANNEL_CAAM_REV3; } - if (fqd_a) { -#ifdef CONFIG_PPC - /* - * For PPC backward DT compatibility - * FQD memory MUST be zero'd by software - */ - zero_priv_mem(fqd_a, fqd_sz); -#else - WARN(1, "Unexpected architecture using non shared-dma-mem reservations"); -#endif - } else { - /* - * Order of memory regions is assumed as FQD followed by PFDR - * in order to ensure allocations from the correct regions the - * driver initializes then allocates each piece in order - */ - ret = qbman_init_private_mem(dev, 0, &fqd_a, &fqd_sz); - if (ret) { - dev_err(dev, "qbman_init_private_mem() for FQD failed 0x%x\n", - ret); - return -ENODEV; - } + /* + * Order of memory regions is assumed as FQD followed by PFDR + * in order to ensure allocations from the correct regions the + * driver initializes then allocates each piece in order + */ + ret = qbman_init_private_mem(dev, 0, "fsl,qman-fqd", &fqd_a, &fqd_sz); + if (ret) { + dev_err(dev, "qbman_init_private_mem() for FQD failed 0x%x\n", + ret); + return -ENODEV; } +#ifdef CONFIG_PPC + /* + * For PPC backward DT compatibility + * FQD memory MUST be zero'd by software + */ + zero_priv_mem(fqd_a, fqd_sz); +#else + WARN(1, "Unexpected architecture using non shared-dma-mem reservations"); +#endif dev_dbg(dev, "Allocated FQD 0x%llx 0x%zx\n", fqd_a, fqd_sz); - if (!pfdr_a) { - /* Setup PFDR memory */ - ret = qbman_init_private_mem(dev, 1, &pfdr_a, &pfdr_sz); - if (ret) { - dev_err(dev, "qbman_init_private_mem() for PFDR failed 0x%x\n", - ret); - return -ENODEV; - } + /* Setup PFDR memory */ + ret = qbman_init_private_mem(dev, 1, "fsl,qman-pfdr", &pfdr_a, &pfdr_sz); + if (ret) { + dev_err(dev, "qbman_init_private_mem() for PFDR failed 0x%x\n", + ret); + return -ENODEV; } dev_dbg(dev, "Allocated PFDR 0x%llx 0x%zx\n", pfdr_a, pfdr_sz); From 4d4f986d296f3435dac4ee4ab79a6614bc8d1442 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 29 Feb 2024 15:09:11 -0500 Subject: [PATCH 44/56] dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support Enable the power-domains property for the fsl,intmux node. This addition accommodates i.MX8QXP, i.MX8QM, and i.MX8DXL, which utilize the power-domains property. Incorporating this eliminates DTB_CHECK errors in relevant device tree source files. Signed-off-by: Frank Li Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240229200911.712572-1-Frank.Li@nxp.com Signed-off-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/fsl,intmux.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml index 985bfa4f6fda..78baa0a571cf 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml @@ -37,6 +37,9 @@ properties: clock-names: const: ipg + power-domains: + maxItems: 1 + required: - compatible - reg From 5d3d723470996d3b9050a89427d9fc72cd0241e9 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 29 Sep 2022 14:29:01 +0200 Subject: [PATCH 45/56] dt-bindings: timer: mediatek: Convert to json-schema Convert the MediaTek SoC timer txt binding to json-schema. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220929122901.614315-3-angelogioacchino.delregno@collabora.com [robh: Add mt8365 compatible, drop duplicate mediatek,mt6795-systimer, drop quotes] Signed-off-by: Rob Herring --- .../bindings/timer/mediatek,mtk-timer.txt | 48 ----------- .../bindings/timer/mediatek,timer.yaml | 84 +++++++++++++++++++ 2 files changed, 84 insertions(+), 48 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt create mode 100644 Documentation/devicetree/bindings/timer/mediatek,timer.yaml diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt deleted file mode 100644 index b3e797e8aa31..000000000000 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ /dev/null @@ -1,48 +0,0 @@ -MediaTek Timers ---------------- - -MediaTek SoCs have different timers on different platforms, -- CPUX (ARM/ARM64 System Timer) -- GPT (General Purpose Timer) -- SYST (System Timer) - -The proper timer will be selected automatically by driver. - -Required properties: -- compatible should contain: - For those SoCs that use GPT - * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT) - * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT) - * "mediatek,mt6582-timer" for MT6582 compatible timers (GPT) - * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT) - * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT) - * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT) - * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT) - * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT) - * "mediatek,mt8516-timer" for MT8516 compatible timers (GPT) - * "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT) - - For those SoCs that use SYST - * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) - * "mediatek,mt8186-timer" for MT8186 compatible timers (SYST) - * "mediatek,mt8188-timer" for MT8188 compatible timers (SYST) - * "mediatek,mt8192-timer" for MT8192 compatible timers (SYST) - * "mediatek,mt8195-timer" for MT8195 compatible timers (SYST) - * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) - * "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST) - - For those SoCs that use CPUX - * "mediatek,mt6795-systimer" for MT6795 compatible timers (CPUX) - * "mediatek,mt8365-systimer" for MT8365 compatible timers (CPUX) - -- reg: Should contain location and length for timer register. -- clocks: Should contain system clock. - -Examples: - - timer@10008000 { - compatible = "mediatek,mt6577-timer"; - reg = <0x10008000 0x80>; - interrupts = ; - clocks = <&system_clk>; - }; diff --git a/Documentation/devicetree/bindings/timer/mediatek,timer.yaml b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml new file mode 100644 index 000000000000..f68fc7050c56 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/mediatek,timer.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/mediatek,timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC timers + +maintainers: + - Matthias Brugger + +description: + MediaTek SoCs have different timers on different platforms, + CPUX (ARM/ARM64 System Timer), GPT (General Purpose Timer) + and SYST (System Timer). + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt6577-timer + - mediatek,mt6765-timer + - mediatek,mt6795-systimer + # GPT Timers + - items: + - enum: + - mediatek,mt2701-timer + - mediatek,mt6580-timer + - mediatek,mt6582-timer + - mediatek,mt6589-timer + - mediatek,mt7623-timer + - mediatek,mt8127-timer + - mediatek,mt8135-timer + - mediatek,mt8173-timer + - mediatek,mt8516-timer + - const: mediatek,mt6577-timer + # SYST Timers + - items: + - enum: + - mediatek,mt7629-timer + - mediatek,mt8183-timer + - mediatek,mt8186-timer + - mediatek,mt8188-timer + - mediatek,mt8192-timer + - mediatek,mt8195-timer + - mediatek,mt8365-systimer + - const: mediatek,mt6765-timer + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + items: + - description: Timer clock + - description: RTC or bus clock + + clock-names: + minItems: 1 + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + timer@10008000 { + compatible = "mediatek,mt6577-timer"; + reg = <0x10008000 0x80>; + interrupts = ; + clocks = <&system_clk>; + }; From dc1460fe1b2dc883195d21759676d55b183fd495 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 16 Feb 2024 17:05:50 -0800 Subject: [PATCH 46/56] of: Always unflatten in unflatten_and_copy_device_tree() We want to populate an empty DT whenever CONFIG_OF is enabled so that overlays can be applied and the DT unit tests can be run. Make unflatten_and_copy_device_tree() stop printing a warning if the 'initial_boot_params' pointer is NULL. Instead, simply copy the dtb if there is one and then unflatten it. If there isn't a DT to copy, then the call to unflatten_device_tree() is largely a no-op, so nothing really changes here. Cc: Rob Herring Cc: Frank Rowand Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20240217010557.2381548-2-sboyd@kernel.org Signed-off-by: Rob Herring --- drivers/of/fdt.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index bf502ba8da95..dfeba8b8ce94 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -1318,6 +1318,21 @@ bool __init early_init_dt_scan(void *params) return true; } +static void *__init copy_device_tree(void *fdt) +{ + int size; + void *dt; + + size = fdt_totalsize(fdt); + dt = early_init_dt_alloc_memory_arch(size, + roundup_pow_of_two(FDT_V17_SIZE)); + + if (dt) + memcpy(dt, fdt, size); + + return dt; +} + /** * unflatten_device_tree - create tree of device_nodes from flat blob * @@ -1350,22 +1365,9 @@ void __init unflatten_device_tree(void) */ void __init unflatten_and_copy_device_tree(void) { - int size; - void *dt; + if (initial_boot_params) + initial_boot_params = copy_device_tree(initial_boot_params); - if (!initial_boot_params) { - pr_warn("No valid device tree found, continuing without\n"); - return; - } - - size = fdt_totalsize(initial_boot_params); - dt = early_init_dt_alloc_memory_arch(size, - roundup_pow_of_two(FDT_V17_SIZE)); - - if (dt) { - memcpy(dt, initial_boot_params, size); - initial_boot_params = dt; - } unflatten_device_tree(); } From 7b937cc243e5b1df8780a0aa743ce800df6c68d1 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Fri, 16 Feb 2024 17:05:51 -0800 Subject: [PATCH 47/56] of: Create of_root if no dtb provided by firmware When enabling CONFIG_OF on a platform where 'of_root' is not populated by firmware, we end up without a root node. In order to apply overlays and create subnodes of the root node, we need one. Create this root node by unflattening an empty builtin dtb. If firmware provides a flattened device tree (FDT) then the FDT is unflattened via setup_arch(). Otherwise, the call to unflatten(_and_copy)?_device_tree() will create an empty root node. We make of_have_populated_dt() return true only if the DTB was loaded by firmware so that existing callers don't change behavior after this patch. The call in the of platform code is removed because it prevents overlays from creating platform devices when the empty root node is used. [sboyd@kernel.org: Update of_have_populated_dt() to treat this empty dtb as not populated. Drop setup_of() initcall] Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230317053415.2254616-2-frowand.list@gmail.com Cc: Rob Herring Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20240217010557.2381548-3-sboyd@kernel.org Signed-off-by: Rob Herring --- drivers/of/Kconfig | 5 ++--- drivers/of/Makefile | 2 +- drivers/of/empty_root.dts | 6 ++++++ drivers/of/fdt.c | 32 +++++++++++++++++++++++++++++++- drivers/of/platform.c | 3 --- include/linux/of.h | 25 +++++++++++++++---------- 6 files changed, 55 insertions(+), 18 deletions(-) create mode 100644 drivers/of/empty_root.dts diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index da9826accb1b..d738fbad9c36 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -14,9 +14,8 @@ if OF config OF_UNITTEST bool "Device Tree runtime unit tests" - depends on !SPARC + depends on OF_EARLY_FLATTREE select IRQ_DOMAIN - select OF_EARLY_FLATTREE select OF_RESOLVE help This option builds in test cases for the device tree infrastructure @@ -54,7 +53,7 @@ config OF_FLATTREE select CRC32 config OF_EARLY_FLATTREE - bool + def_bool OF && !(SPARC || ALPHA || HEXAGON || M68K || PARISC || S390) select DMA_DECLARE_COHERENT if HAS_DMA && HAS_IOMEM select OF_FLATTREE diff --git a/drivers/of/Makefile b/drivers/of/Makefile index eff624854575..df305348d1cb 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -2,7 +2,7 @@ obj-y = base.o cpu.o device.o module.o platform.o property.o obj-$(CONFIG_OF_KOBJ) += kobj.o obj-$(CONFIG_OF_DYNAMIC) += dynamic.o -obj-$(CONFIG_OF_FLATTREE) += fdt.o +obj-$(CONFIG_OF_FLATTREE) += fdt.o empty_root.dtb.o obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o obj-$(CONFIG_OF_PROMTREE) += pdt.o obj-$(CONFIG_OF_ADDRESS) += address.o diff --git a/drivers/of/empty_root.dts b/drivers/of/empty_root.dts new file mode 100644 index 000000000000..cf9e97a60f48 --- /dev/null +++ b/drivers/of/empty_root.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; + +/ { + +}; diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index dfeba8b8ce94..e5a385285149 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -8,6 +8,7 @@ #define pr_fmt(fmt) "OF: fdt: " fmt +#include #include #include #include @@ -32,6 +33,13 @@ #include "of_private.h" +/* + * __dtb_empty_root_begin[] and __dtb_empty_root_end[] magically created by + * cmd_dt_S_dtb in scripts/Makefile.lib + */ +extern uint8_t __dtb_empty_root_begin[]; +extern uint8_t __dtb_empty_root_end[]; + /* * of_fdt_limit_memory - limit the number of regions in the /memory node * @limit: maximum entries @@ -1343,7 +1351,29 @@ static void *__init copy_device_tree(void *fdt) */ void __init unflatten_device_tree(void) { - __unflatten_device_tree(initial_boot_params, NULL, &of_root, + void *fdt = initial_boot_params; + + /* Don't use the bootloader provided DTB if ACPI is enabled */ + if (!acpi_disabled) + fdt = NULL; + + /* + * Populate an empty root node when ACPI is enabled or bootloader + * doesn't provide one. + */ + if (!fdt) { + fdt = (void *) __dtb_empty_root_begin; + /* fdt_totalsize() will be used for copy size */ + if (fdt_totalsize(fdt) > + __dtb_empty_root_end - __dtb_empty_root_begin) { + pr_err("invalid size in dtb_empty_root\n"); + return; + } + of_fdt_crc32 = crc32_be(~0, fdt, fdt_totalsize(fdt)); + fdt = copy_device_tree(fdt); + } + + __unflatten_device_tree(fdt, NULL, &of_root, early_init_dt_alloc_memory_arch, false); /* Get pointer to "/chosen" and "/aliases" nodes for use everywhere */ diff --git a/drivers/of/platform.c b/drivers/of/platform.c index ba964df6b6db..389d4ea6bfc1 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -512,9 +512,6 @@ static int __init of_platform_default_populate_init(void) device_links_supplier_sync_state_pause(); - if (!of_have_populated_dt()) - return -ENODEV; - if (IS_ENABLED(CONFIG_PPC)) { struct device_node *boot_display = NULL; struct platform_device *dev; diff --git a/include/linux/of.h b/include/linux/of.h index a3e8e429ad7f..d5e7acdc8c8e 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -180,11 +180,6 @@ static inline bool is_of_node(const struct fwnode_handle *fwnode) &__of_fwnode_handle_node->fwnode : NULL; \ }) -static inline bool of_have_populated_dt(void) -{ - return of_root != NULL; -} - static inline bool of_node_is_root(const struct device_node *node) { return node && (node->parent == NULL); @@ -546,11 +541,6 @@ static inline struct device_node *of_find_node_with_property( #define of_fwnode_handle(node) NULL -static inline bool of_have_populated_dt(void) -{ - return false; -} - static inline struct device_node *of_get_compatible_child(const struct device_node *parent, const char *compatible) { @@ -1634,6 +1624,21 @@ static inline bool of_device_is_system_power_controller(const struct device_node return of_property_read_bool(np, "system-power-controller"); } +/** + * of_have_populated_dt() - Has DT been populated by bootloader + * + * Return: True if a DTB has been populated by the bootloader and it isn't the + * empty builtin one. False otherwise. + */ +static inline bool of_have_populated_dt(void) +{ +#ifdef CONFIG_OF + return of_property_present(of_root, "compatible"); +#else + return false; +#endif +} + /* * Overlay support */ From 221a819aa3ca5bbbc91ce425b3e8d9463b121d09 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 16 Feb 2024 17:05:52 -0800 Subject: [PATCH 48/56] um: Unconditionally call unflatten_device_tree() Call this function unconditionally so that we can populate an empty DTB on platforms that don't boot with a command line provided DTB. There's no harm in calling unflatten_device_tree() unconditionally. If there isn't a valid initial_boot_params dtb then unflatten_device_tree() returns early. Cc: Rob Herring Cc: Frank Rowand Cc: Richard Weinberger Cc: Anton Ivanov Cc: Johannes Berg Cc: linux-um@lists.infradead.org Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20240217010557.2381548-4-sboyd@kernel.org Signed-off-by: Rob Herring --- arch/um/kernel/dtb.c | 14 +++++++------- drivers/of/unittest.c | 4 ---- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/arch/um/kernel/dtb.c b/arch/um/kernel/dtb.c index 484141b06938..4954188a6a09 100644 --- a/arch/um/kernel/dtb.c +++ b/arch/um/kernel/dtb.c @@ -16,16 +16,16 @@ void uml_dtb_init(void) void *area; area = uml_load_file(dtb, &size); - if (!area) - return; + if (area) { + if (!early_init_dt_scan(area)) { + pr_err("invalid DTB %s\n", dtb); + memblock_free(area, size); + return; + } - if (!early_init_dt_scan(area)) { - pr_err("invalid DTB %s\n", dtb); - memblock_free(area, size); - return; + early_init_fdt_scan_reserved_mem(); } - early_init_fdt_scan_reserved_mem(); unflatten_device_tree(); } diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index cfd60e35a899..891752a20a5f 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -4087,10 +4087,6 @@ static int __init of_unittest(void) add_taint(TAINT_TEST, LOCKDEP_STILL_OK); /* adding data for unittest */ - - if (IS_ENABLED(CONFIG_UML)) - unittest_unflatten_overlay_base(); - res = unittest_data_add(); if (res) return res; From 40f18dbbb42c56019b889b5b1fdce3da89e354da Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 16 Feb 2024 17:05:53 -0800 Subject: [PATCH 49/56] x86/of: Unconditionally call unflatten_and_copy_device_tree() Call this function unconditionally so that we can populate an empty DTB on platforms that don't boot with a firmware provided or builtin DTB. There's no harm in calling unflatten_device_tree() unconditionally here. If there isn't a non-NULL 'initial_boot_params' pointer then unflatten_device_tree() returns early. Cc: Rob Herring Cc: Frank Rowand Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: x86@kernel.org Cc: H. Peter Anvin Tested-by: Saurabh Sengar Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20240217010557.2381548-5-sboyd@kernel.org Signed-off-by: Rob Herring --- arch/x86/kernel/devicetree.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c index afd09924094e..650752d112a6 100644 --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -283,22 +283,24 @@ void __init x86_flattree_get_config(void) u32 size, map_len; void *dt; - if (!initial_dtb) - return; + if (initial_dtb) { + map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); - map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128); + dt = early_memremap(initial_dtb, map_len); + size = fdt_totalsize(dt); + if (map_len < size) { + early_memunmap(dt, map_len); + dt = early_memremap(initial_dtb, size); + map_len = size; + } - dt = early_memremap(initial_dtb, map_len); - size = fdt_totalsize(dt); - if (map_len < size) { - early_memunmap(dt, map_len); - dt = early_memremap(initial_dtb, size); - map_len = size; + early_init_dt_verify(dt); } - early_init_dt_verify(dt); unflatten_and_copy_device_tree(); - early_memunmap(dt, map_len); + + if (initial_dtb) + early_memunmap(dt, map_len); } #endif From d1eabd218edee6a6f0458a8705ebc02b860a624f Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Fri, 16 Feb 2024 17:05:55 -0800 Subject: [PATCH 50/56] of: unittest: treat missing of_root as error instead of fixing up unflatten_device_tree() now ensures that the 'of_root' node is populated with the root of a default empty devicetree. Remove the unittest code that created 'of_root' if it was missing. Verify that 'of_root' is valid before attempting to attach the testcase-data subtree. Remove the unittest code that unflattens the unittest overlay base if architecture is UML because that is always done now. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230317053415.2254616-3-frowand.list@gmail.com Cc: Rob Herring Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20240217010557.2381548-7-sboyd@kernel.org Signed-off-by: Rob Herring --- drivers/of/unittest.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index 891752a20a5f..4c67de37bf26 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -1744,20 +1744,16 @@ static int __init unittest_data_add(void) return -EINVAL; } + /* attach the sub-tree to live tree */ if (!of_root) { - of_root = unittest_data_node; - for_each_of_allnodes(np) - __of_attach_node_sysfs(np); - of_aliases = of_find_node_by_path("/aliases"); - of_chosen = of_find_node_by_path("/chosen"); - of_overlay_mutex_unlock(); - return 0; + pr_warn("%s: no live tree to attach sub-tree\n", __func__); + kfree(unittest_data); + return -ENODEV; } EXPECT_BEGIN(KERN_INFO, "Duplicate name in testcase-data, renamed to \"duplicate-name#1\""); - /* attach the sub-tree to live tree */ np = unittest_data_node->child; while (np) { struct device_node *next = np->sibling; From 893ecc6d2d61381bc56991178cb3de697a948b78 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 16 Feb 2024 17:05:56 -0800 Subject: [PATCH 51/56] of: Add KUnit test to confirm DTB is loaded Add a KUnit test that confirms a DTB has been loaded, i.e. there is a root node, and that the of_have_populated_dt() API works properly. We skip the test when CONFIG_OF_EARLY_FLATREE=n because in that case we know architecture code hasn't called unflatten_(and_copy_)?device_tree() which would populate some sort of root node. Cc: Rob Herring Cc: Frank Rowand Reviewed-by: David Gow Cc: Brendan Higgins Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20240217010557.2381548-8-sboyd@kernel.org Signed-off-by: Rob Herring --- drivers/of/.kunitconfig | 3 +++ drivers/of/Kconfig | 9 +++++++ drivers/of/Makefile | 2 ++ drivers/of/of_test.c | 57 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 71 insertions(+) create mode 100644 drivers/of/.kunitconfig create mode 100644 drivers/of/of_test.c diff --git a/drivers/of/.kunitconfig b/drivers/of/.kunitconfig new file mode 100644 index 000000000000..5a8fee11978c --- /dev/null +++ b/drivers/of/.kunitconfig @@ -0,0 +1,3 @@ +CONFIG_KUNIT=y +CONFIG_OF=y +CONFIG_OF_KUNIT_TEST=y diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index d738fbad9c36..dd726c7056bf 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -36,6 +36,15 @@ config OF_UNITTEST If unsure, say N here. This option is not safe to enable. +config OF_KUNIT_TEST + tristate "Devicetree KUnit Test" if !KUNIT_ALL_TESTS + depends on KUNIT + default KUNIT_ALL_TESTS + help + This option builds KUnit unit tests for device tree infrastructure. + + If unsure, say N here, but this option is safe to enable. + config OF_ALL_DTBS bool "Build all Device Tree Blobs" depends on COMPILE_TEST diff --git a/drivers/of/Makefile b/drivers/of/Makefile index df305348d1cb..251d33532148 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -19,4 +19,6 @@ obj-y += kexec.o endif endif +obj-$(CONFIG_OF_KUNIT_TEST) += of_test.o + obj-$(CONFIG_OF_UNITTEST) += unittest-data/ diff --git a/drivers/of/of_test.c b/drivers/of/of_test.c new file mode 100644 index 000000000000..a9301d293f01 --- /dev/null +++ b/drivers/of/of_test.c @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * KUnit tests for OF APIs + */ +#include +#include + +#include + +/* + * Test that the root node "/" can be found by path. + */ +static void of_dtb_root_node_found_by_path(struct kunit *test) +{ + struct device_node *np; + + np = of_find_node_by_path("/"); + KUNIT_EXPECT_NOT_ERR_OR_NULL(test, np); + of_node_put(np); +} + +/* + * Test that the 'of_root' global variable is always populated when DT code is + * enabled. Remove this test once of_root is removed from global access. + */ +static void of_dtb_root_node_populates_of_root(struct kunit *test) +{ + KUNIT_EXPECT_NOT_ERR_OR_NULL(test, of_root); +} + +static struct kunit_case of_dtb_test_cases[] = { + KUNIT_CASE(of_dtb_root_node_found_by_path), + KUNIT_CASE(of_dtb_root_node_populates_of_root), + {} +}; + +static int of_dtb_test_init(struct kunit *test) +{ + if (!IS_ENABLED(CONFIG_OF_EARLY_FLATTREE)) + kunit_skip(test, "requires CONFIG_OF_EARLY_FLATTREE"); + + return 0; +} + +/* + * Test suite to confirm a DTB is loaded. + */ +static struct kunit_suite of_dtb_suite = { + .name = "of_dtb", + .test_cases = of_dtb_test_cases, + .init = of_dtb_test_init, +}; + +kunit_test_suites( + &of_dtb_suite, +); +MODULE_LICENSE("GPL"); From 54c180e73ffa3e17a8289fa531279eeb2034b69f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 11 Mar 2024 12:13:03 -0600 Subject: [PATCH 52/56] of: Move all FDT reserved-memory handling into of_reserved_mem.c The split of /reserved-memory handling between fdt.c and of_reserved_mem.c makes for reading and restructuring the code difficult. As of_reserved_mem.c is only built for CONFIG_OF_EARLY_FLATTREE already, move all the code to one spot. Acked-by: Saravana Kannan Reviewed-by: Oreoluwa Babatunde Link: https://lore.kernel.org/r/20240311181303.1516514-2-robh@kernel.org Signed-off-by: Rob Herring --- drivers/of/fdt.c | 123 +--------------------------------- drivers/of/of_private.h | 5 +- drivers/of/of_reserved_mem.c | 125 ++++++++++++++++++++++++++++++++++- 3 files changed, 127 insertions(+), 126 deletions(-) diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index e5a385285149..a8a04f27915b 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -88,7 +87,7 @@ void __init of_fdt_limit_memory(int limit) } } -static bool of_fdt_device_is_available(const void *blob, unsigned long node) +bool of_fdt_device_is_available(const void *blob, unsigned long node) { const char *status = fdt_getprop(blob, node, "status", NULL); @@ -484,126 +483,6 @@ void *initial_boot_params __ro_after_init; static u32 of_fdt_crc32; -static int __init early_init_dt_reserve_memory(phys_addr_t base, - phys_addr_t size, bool nomap) -{ - if (nomap) { - /* - * If the memory is already reserved (by another region), we - * should not allow it to be marked nomap, but don't worry - * if the region isn't memory as it won't be mapped. - */ - if (memblock_overlaps_region(&memblock.memory, base, size) && - memblock_is_region_reserved(base, size)) - return -EBUSY; - - return memblock_mark_nomap(base, size); - } - return memblock_reserve(base, size); -} - -/* - * __reserved_mem_reserve_reg() - reserve all memory described in 'reg' property - */ -static int __init __reserved_mem_reserve_reg(unsigned long node, - const char *uname) -{ - int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32); - phys_addr_t base, size; - int len; - const __be32 *prop; - int first = 1; - bool nomap; - - prop = of_get_flat_dt_prop(node, "reg", &len); - if (!prop) - return -ENOENT; - - if (len && len % t_len != 0) { - pr_err("Reserved memory: invalid reg property in '%s', skipping node.\n", - uname); - return -EINVAL; - } - - nomap = of_get_flat_dt_prop(node, "no-map", NULL) != NULL; - - while (len >= t_len) { - base = dt_mem_next_cell(dt_root_addr_cells, &prop); - size = dt_mem_next_cell(dt_root_size_cells, &prop); - - if (size && - early_init_dt_reserve_memory(base, size, nomap) == 0) - pr_debug("Reserved memory: reserved region for node '%s': base %pa, size %lu MiB\n", - uname, &base, (unsigned long)(size / SZ_1M)); - else - pr_err("Reserved memory: failed to reserve memory for node '%s': base %pa, size %lu MiB\n", - uname, &base, (unsigned long)(size / SZ_1M)); - - len -= t_len; - if (first) { - fdt_reserved_mem_save_node(node, uname, base, size); - first = 0; - } - } - return 0; -} - -/* - * __reserved_mem_check_root() - check if #size-cells, #address-cells provided - * in /reserved-memory matches the values supported by the current implementation, - * also check if ranges property has been provided - */ -static int __init __reserved_mem_check_root(unsigned long node) -{ - const __be32 *prop; - - prop = of_get_flat_dt_prop(node, "#size-cells", NULL); - if (!prop || be32_to_cpup(prop) != dt_root_size_cells) - return -EINVAL; - - prop = of_get_flat_dt_prop(node, "#address-cells", NULL); - if (!prop || be32_to_cpup(prop) != dt_root_addr_cells) - return -EINVAL; - - prop = of_get_flat_dt_prop(node, "ranges", NULL); - if (!prop) - return -EINVAL; - return 0; -} - -/* - * fdt_scan_reserved_mem() - scan a single FDT node for reserved memory - */ -static int __init fdt_scan_reserved_mem(void) -{ - int node, child; - const void *fdt = initial_boot_params; - - node = fdt_path_offset(fdt, "/reserved-memory"); - if (node < 0) - return -ENODEV; - - if (__reserved_mem_check_root(node) != 0) { - pr_err("Reserved memory: unsupported node format, ignoring\n"); - return -EINVAL; - } - - fdt_for_each_subnode(child, fdt, node) { - const char *uname; - int err; - - if (!of_fdt_device_is_available(fdt, child)) - continue; - - uname = fdt_get_name(fdt, child, NULL); - - err = __reserved_mem_reserve_reg(child, uname); - if (err == -ENOENT && of_get_flat_dt_prop(child, "size", NULL)) - fdt_reserved_mem_save_node(child, uname, 0, 0); - } - return 0; -} - /* * fdt_reserve_elfcorehdr() - reserves memory for elf core header * diff --git a/drivers/of/of_private.h b/drivers/of/of_private.h index f38397c7b582..485483524b7f 100644 --- a/drivers/of/of_private.h +++ b/drivers/of/of_private.h @@ -175,8 +175,9 @@ static inline struct device_node *__of_get_dma_parent(const struct device_node * } #endif +int fdt_scan_reserved_mem(void); void fdt_init_reserved_mem(void); -void fdt_reserved_mem_save_node(unsigned long node, const char *uname, - phys_addr_t base, phys_addr_t size); + +bool of_fdt_device_is_available(const void *blob, unsigned long node); #endif /* _LINUX_OF_PRIVATE_H */ diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 7ec94cfcbddb..8236ecae2953 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -12,6 +12,7 @@ #define pr_fmt(fmt) "OF: reserved mem: " fmt #include +#include #include #include #include @@ -58,8 +59,8 @@ static int __init early_init_dt_alloc_reserved_memory_arch(phys_addr_t size, /* * fdt_reserved_mem_save_node() - save fdt node for second pass initialization */ -void __init fdt_reserved_mem_save_node(unsigned long node, const char *uname, - phys_addr_t base, phys_addr_t size) +static void __init fdt_reserved_mem_save_node(unsigned long node, const char *uname, + phys_addr_t base, phys_addr_t size) { struct reserved_mem *rmem = &reserved_mem[reserved_mem_count]; @@ -77,6 +78,126 @@ void __init fdt_reserved_mem_save_node(unsigned long node, const char *uname, return; } +static int __init early_init_dt_reserve_memory(phys_addr_t base, + phys_addr_t size, bool nomap) +{ + if (nomap) { + /* + * If the memory is already reserved (by another region), we + * should not allow it to be marked nomap, but don't worry + * if the region isn't memory as it won't be mapped. + */ + if (memblock_overlaps_region(&memblock.memory, base, size) && + memblock_is_region_reserved(base, size)) + return -EBUSY; + + return memblock_mark_nomap(base, size); + } + return memblock_reserve(base, size); +} + +/* + * __reserved_mem_reserve_reg() - reserve all memory described in 'reg' property + */ +static int __init __reserved_mem_reserve_reg(unsigned long node, + const char *uname) +{ + int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32); + phys_addr_t base, size; + int len; + const __be32 *prop; + int first = 1; + bool nomap; + + prop = of_get_flat_dt_prop(node, "reg", &len); + if (!prop) + return -ENOENT; + + if (len && len % t_len != 0) { + pr_err("Reserved memory: invalid reg property in '%s', skipping node.\n", + uname); + return -EINVAL; + } + + nomap = of_get_flat_dt_prop(node, "no-map", NULL) != NULL; + + while (len >= t_len) { + base = dt_mem_next_cell(dt_root_addr_cells, &prop); + size = dt_mem_next_cell(dt_root_size_cells, &prop); + + if (size && + early_init_dt_reserve_memory(base, size, nomap) == 0) + pr_debug("Reserved memory: reserved region for node '%s': base %pa, size %lu MiB\n", + uname, &base, (unsigned long)(size / SZ_1M)); + else + pr_err("Reserved memory: failed to reserve memory for node '%s': base %pa, size %lu MiB\n", + uname, &base, (unsigned long)(size / SZ_1M)); + + len -= t_len; + if (first) { + fdt_reserved_mem_save_node(node, uname, base, size); + first = 0; + } + } + return 0; +} + +/* + * __reserved_mem_check_root() - check if #size-cells, #address-cells provided + * in /reserved-memory matches the values supported by the current implementation, + * also check if ranges property has been provided + */ +static int __init __reserved_mem_check_root(unsigned long node) +{ + const __be32 *prop; + + prop = of_get_flat_dt_prop(node, "#size-cells", NULL); + if (!prop || be32_to_cpup(prop) != dt_root_size_cells) + return -EINVAL; + + prop = of_get_flat_dt_prop(node, "#address-cells", NULL); + if (!prop || be32_to_cpup(prop) != dt_root_addr_cells) + return -EINVAL; + + prop = of_get_flat_dt_prop(node, "ranges", NULL); + if (!prop) + return -EINVAL; + return 0; +} + +/* + * fdt_scan_reserved_mem() - scan a single FDT node for reserved memory + */ +int __init fdt_scan_reserved_mem(void) +{ + int node, child; + const void *fdt = initial_boot_params; + + node = fdt_path_offset(fdt, "/reserved-memory"); + if (node < 0) + return -ENODEV; + + if (__reserved_mem_check_root(node) != 0) { + pr_err("Reserved memory: unsupported node format, ignoring\n"); + return -EINVAL; + } + + fdt_for_each_subnode(child, fdt, node) { + const char *uname; + int err; + + if (!of_fdt_device_is_available(fdt, child)) + continue; + + uname = fdt_get_name(fdt, child, NULL); + + err = __reserved_mem_reserve_reg(child, uname); + if (err == -ENOENT && of_get_flat_dt_prop(child, "size", NULL)) + fdt_reserved_mem_save_node(child, uname, 0, 0); + } + return 0; +} + /* * __reserved_mem_alloc_in_range() - allocate reserved memory described with * 'alloc-ranges'. Choose bottom-up/top-down depending on nearby existing From 9448e55d032d99af8e23487f51a542d51b2f1a48 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Sun, 25 Feb 2024 14:27:11 +0000 Subject: [PATCH 53/56] of: Add cleanup.h based auto release via __free(device_node) markings The recent addition of scope based cleanup support to the kernel provides a convenient tool to reduce the chances of leaking reference counts where of_node_put() should have been called in an error path. This enables struct device_node *child __free(device_node) = NULL; for_each_child_of_node(np, child) { if (test) return test; } with no need for a manual call of of_node_put(). A following patch will reduce the scope of the child variable to the for loop, to avoid an issues with ordering of autocleanup, and make it obvious when this assigned a non NULL value. In this simple example the gains are small but there are some very complex error handling cases buried in these loops that will be greatly simplified by enabling early returns with out the need for this manual of_node_put() call. Note that there are coccinelle checks in scripts/coccinelle/iterators/for_each_child.cocci to detect a failure to call of_node_put(). This new approach does not cause false positives. Longer term we may want to add scripting to check this new approach is done correctly with no double of_node_put() calls being introduced due to the auto cleanup. It may also be useful to script finding places this new approach is useful. Signed-off-by: Jonathan Cameron Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20240225142714.286440-2-jic23@kernel.org Signed-off-by: Rob Herring --- include/linux/of.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/of.h b/include/linux/of.h index d5e7acdc8c8e..2992e24cd72b 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -13,6 +13,7 @@ */ #include #include +#include #include #include #include @@ -134,6 +135,7 @@ static inline struct device_node *of_node_get(struct device_node *node) } static inline void of_node_put(struct device_node *node) { } #endif /* !CONFIG_OF_DYNAMIC */ +DEFINE_FREE(device_node, struct device_node *, if (_T) of_node_put(_T)) /* Pointer for first entry in chain of all nodes. */ extern struct device_node *of_root; From 34af4554fb0ce164e2c4876683619eb1e23848d4 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Sun, 25 Feb 2024 14:27:12 +0000 Subject: [PATCH 54/56] of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling To avoid issues with out of order cleanup, or ambiguity about when the auto freed data is first instantiated, do it within the for loop definition. The disadvantage is that the struct device_node *child variable creation is not immediately obvious where this is used. However, in many cases, if there is another definition of struct device_node *child; the compiler / static analysers will notify us that it is unused, or uninitialized. Note that, in the vast majority of cases, the _available_ form should be used and as code is converted to these scoped handers, we should confirm that any cases that do not check for available have a good reason not to. Signed-off-by: Jonathan Cameron Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20240225142714.286440-3-jic23@kernel.org Signed-off-by: Rob Herring --- include/linux/of.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/linux/of.h b/include/linux/of.h index 2992e24cd72b..4677e50d52b7 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1420,10 +1420,23 @@ static inline int of_property_read_s32(const struct device_node *np, #define for_each_child_of_node(parent, child) \ for (child = of_get_next_child(parent, NULL); child != NULL; \ child = of_get_next_child(parent, child)) + +#define for_each_child_of_node_scoped(parent, child) \ + for (struct device_node *child __free(device_node) = \ + of_get_next_child(parent, NULL); \ + child != NULL; \ + child = of_get_next_child(parent, child)) + #define for_each_available_child_of_node(parent, child) \ for (child = of_get_next_available_child(parent, NULL); child != NULL; \ child = of_get_next_available_child(parent, child)) +#define for_each_available_child_of_node_scoped(parent, child) \ + for (struct device_node *child __free(device_node) = \ + of_get_next_available_child(parent, NULL); \ + child != NULL; \ + child = of_get_next_available_child(parent, child)) + #define for_each_of_cpu_node(cpu) \ for (cpu = of_get_next_cpu_node(NULL); cpu != NULL; \ cpu = of_get_next_cpu_node(cpu)) From 2056b282ad191589e4ceb5a8fdab639b9549edc6 Mon Sep 17 00:00:00 2001 From: Jonathan Cameron Date: Sun, 25 Feb 2024 14:27:13 +0000 Subject: [PATCH 55/56] of: unittest: Use for_each_child_of_node_scoped() A simple example of the utility of this autocleanup approach to handling of_node_put(). In this particular case some of the nodes needed for the test are not available and the _available_ version would cause them to be skipped resulting in a test failure. Signed-off-by: Jonathan Cameron Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20240225142714.286440-4-jic23@kernel.org Signed-off-by: Rob Herring --- drivers/of/unittest.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index 4c67de37bf26..0913d916e790 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -233,27 +233,22 @@ static void __init of_unittest_dynamic(void) static int __init of_unittest_check_node_linkage(struct device_node *np) { - struct device_node *child; int count = 0, rc; - for_each_child_of_node(np, child) { + for_each_child_of_node_scoped(np, child) { if (child->parent != np) { pr_err("Child node %pOFn links to wrong parent %pOFn\n", child, np); - rc = -EINVAL; - goto put_child; + return -EINVAL; } rc = of_unittest_check_node_linkage(child); if (rc < 0) - goto put_child; + return rc; count += rc; } return count + 1; -put_child: - of_node_put(child); - return rc; } static void __init of_unittest_check_tree_linkage(void) From 7e98fe49f8896cc60c2a88c60bc535aa3e0e2564 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Thu, 14 Mar 2024 15:59:53 +0100 Subject: [PATCH 56/56] dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators imx6q has additional regulators compared to imx6ul. Add them to the list of allowed patterns. Signed-off-by: Alexander Stein Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240314145953.2957313-1-alexander.stein@ew.tq-group.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml index 5a59e3470510..c4ae4f28422b 100644 --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx-anatop.yaml @@ -43,7 +43,7 @@ properties: $ref: /schemas/thermal/imx-thermal.yaml patternProperties: - "regulator-((3p0)|(vddcore)|(vddsoc))$": + "regulator-((1p1)|(2p5)|(3p0)|(vddcore)|(vddpu)|(vddsoc))$": type: object unevaluatedProperties: false $ref: /schemas/regulator/anatop-regulator.yaml