irqchip/loongson-htvec: Add ACPI init support
HTVECINTC stands for "HyperTransport Interrupts" that described in Section 14.3 of "Loongson 3A5000 Processor Reference Manual". For more information please refer Documentation/loongarch/irq-chip-model.rst. Though the extended model is the recommended one, there are still some legacy model machines. So we add ACPI init support for HTVECINTC. Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221020142535.1725573-1-chenhuacai@loongson.cn
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@ -93,7 +93,7 @@ int liointc_acpi_init(struct irq_domain *parent,
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int eiointc_acpi_init(struct irq_domain *parent,
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struct acpi_madt_eio_pic *acpi_eiointc);
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struct irq_domain *htvec_acpi_init(struct irq_domain *parent,
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int htvec_acpi_init(struct irq_domain *parent,
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struct acpi_madt_ht_pic *acpi_htvec);
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int pch_lpc_acpi_init(struct irq_domain *parent,
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struct acpi_madt_lpc_pic *acpi_pchlpc);
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@ -576,6 +576,7 @@ config IRQ_LOONGARCH_CPU
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select GENERIC_IRQ_CHIP
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select IRQ_DOMAIN
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select GENERIC_IRQ_EFFECTIVE_AFF_MASK
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select LOONGSON_HTVEC
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select LOONGSON_LIOINTC
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select LOONGSON_EIOINTC
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select LOONGSON_PCH_PIC
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@ -20,7 +20,6 @@
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/* Registers */
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#define HTVEC_EN_OFF 0x20
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#define HTVEC_MAX_PARENT_IRQ 8
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#define VEC_COUNT_PER_REG 32
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#define VEC_REG_IDX(irq_id) ((irq_id) / VEC_COUNT_PER_REG)
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#define VEC_REG_BIT(irq_id) ((irq_id) % VEC_COUNT_PER_REG)
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@ -32,6 +31,8 @@ struct htvec {
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raw_spinlock_t htvec_lock;
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};
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static struct htvec *htvec_priv;
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static void htvec_irq_dispatch(struct irq_desc *desc)
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{
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int i;
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@ -155,64 +156,144 @@ static void htvec_reset(struct htvec *priv)
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}
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}
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static int htvec_of_init(struct device_node *node,
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struct device_node *parent)
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static int htvec_init(phys_addr_t addr, unsigned long size,
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int num_parents, int parent_irq[], struct fwnode_handle *domain_handle)
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{
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int i;
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struct htvec *priv;
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int err, parent_irq[8], i;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->num_parents = num_parents;
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priv->base = ioremap(addr, size);
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raw_spin_lock_init(&priv->htvec_lock);
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priv->base = of_iomap(node, 0);
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if (!priv->base) {
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err = -ENOMEM;
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goto free_priv;
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/* Setup IRQ domain */
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priv->htvec_domain = irq_domain_create_linear(domain_handle,
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(VEC_COUNT_PER_REG * priv->num_parents),
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&htvec_domain_ops, priv);
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if (!priv->htvec_domain) {
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pr_err("loongson-htvec: cannot add IRQ domain\n");
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goto iounmap_base;
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}
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htvec_reset(priv);
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for (i = 0; i < priv->num_parents; i++) {
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irq_set_chained_handler_and_data(parent_irq[i],
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htvec_irq_dispatch, priv);
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}
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htvec_priv = priv;
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return 0;
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iounmap_base:
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iounmap(priv->base);
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kfree(priv);
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return -EINVAL;
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}
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#ifdef CONFIG_OF
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static int htvec_of_init(struct device_node *node,
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struct device_node *parent)
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{
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int i, err;
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int parent_irq[8];
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int num_parents = 0;
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struct resource res;
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if (of_address_to_resource(node, 0, &res))
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return -EINVAL;
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/* Interrupt may come from any of the 8 interrupt lines */
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for (i = 0; i < HTVEC_MAX_PARENT_IRQ; i++) {
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parent_irq[i] = irq_of_parse_and_map(node, i);
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if (parent_irq[i] <= 0)
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break;
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priv->num_parents++;
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num_parents++;
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}
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if (!priv->num_parents) {
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pr_err("Failed to get parent irqs\n");
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err = -ENODEV;
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goto iounmap_base;
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}
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priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node),
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(VEC_COUNT_PER_REG * priv->num_parents),
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&htvec_domain_ops, priv);
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if (!priv->htvec_domain) {
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pr_err("Failed to create IRQ domain\n");
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err = -ENOMEM;
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goto irq_dispose;
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}
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htvec_reset(priv);
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for (i = 0; i < priv->num_parents; i++)
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irq_set_chained_handler_and_data(parent_irq[i],
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htvec_irq_dispatch, priv);
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err = htvec_init(res.start, resource_size(&res),
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num_parents, parent_irq, of_node_to_fwnode(node));
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if (err < 0)
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return err;
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return 0;
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irq_dispose:
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for (; i > 0; i--)
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irq_dispose_mapping(parent_irq[i - 1]);
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iounmap_base:
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iounmap(priv->base);
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free_priv:
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kfree(priv);
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return err;
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}
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IRQCHIP_DECLARE(htvec, "loongson,htvec-1.0", htvec_of_init);
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#endif
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#ifdef CONFIG_ACPI
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static int __init pch_pic_parse_madt(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_madt_bio_pic *pchpic_entry = (struct acpi_madt_bio_pic *)header;
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return pch_pic_acpi_init(htvec_priv->htvec_domain, pchpic_entry);
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}
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static int __init pch_msi_parse_madt(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_madt_msi_pic *pchmsi_entry = (struct acpi_madt_msi_pic *)header;
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return pch_msi_acpi_init(htvec_priv->htvec_domain, pchmsi_entry);
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}
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static int __init acpi_cascade_irqdomain_init(void)
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{
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int r;
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r = acpi_table_parse_madt(ACPI_MADT_TYPE_BIO_PIC, pch_pic_parse_madt, 0);
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if (r < 0)
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return r;
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r = acpi_table_parse_madt(ACPI_MADT_TYPE_MSI_PIC, pch_msi_parse_madt, 0);
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if (r < 0)
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return r;
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return 0;
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}
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int __init htvec_acpi_init(struct irq_domain *parent,
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struct acpi_madt_ht_pic *acpi_htvec)
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{
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int i, ret;
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int num_parents, parent_irq[8];
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struct fwnode_handle *domain_handle;
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if (!acpi_htvec)
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return -EINVAL;
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num_parents = HTVEC_MAX_PARENT_IRQ;
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domain_handle = irq_domain_alloc_fwnode(&acpi_htvec->address);
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if (!domain_handle) {
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pr_err("Unable to allocate domain handle\n");
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return -ENOMEM;
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}
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/* Interrupt may come from any of the 8 interrupt lines */
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for (i = 0; i < HTVEC_MAX_PARENT_IRQ; i++)
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parent_irq[i] = irq_create_mapping(parent, acpi_htvec->cascade[i]);
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ret = htvec_init(acpi_htvec->address, acpi_htvec->size,
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num_parents, parent_irq, domain_handle);
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if (ret == 0)
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ret = acpi_cascade_irqdomain_init();
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else
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irq_domain_free_fwnode(domain_handle);
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return ret;
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}
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#endif
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@ -354,6 +354,26 @@ IRQCHIP_DECLARE(loongson_liointc_2_0, "loongson,liointc-2.0", liointc_of_init);
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#endif
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#ifdef CONFIG_ACPI
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static int __init htintc_parse_madt(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_madt_ht_pic *htintc_entry = (struct acpi_madt_ht_pic *)header;
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struct irq_domain *parent = irq_find_matching_fwnode(liointc_handle, DOMAIN_BUS_ANY);
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return htvec_acpi_init(parent, htintc_entry);
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}
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static int __init acpi_cascade_irqdomain_init(void)
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{
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int r;
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r = acpi_table_parse_madt(ACPI_MADT_TYPE_HT_PIC, htintc_parse_madt, 0);
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if (r < 0)
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return r;
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return 0;
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}
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int __init liointc_acpi_init(struct irq_domain *parent, struct acpi_madt_lio_pic *acpi_liointc)
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{
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int ret;
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pr_err("Unable to allocate domain handle\n");
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return -ENOMEM;
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}
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ret = liointc_init(acpi_liointc->address, acpi_liointc->size,
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1, domain_handle, NULL);
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if (ret)
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if (ret == 0)
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ret = acpi_cascade_irqdomain_init();
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else
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irq_domain_free_fwnode(domain_handle);
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return ret;
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