spi: sun4i: switch to use modern name
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-7-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -75,7 +75,7 @@
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#define SUN4I_FIFO_STA_TF_CNT_BITS 16
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struct sun4i_spi {
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struct spi_master *master;
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struct spi_controller *host;
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void __iomem *base_addr;
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struct clk *hclk;
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struct clk *mclk;
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@ -161,7 +161,7 @@ static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len)
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static void sun4i_spi_set_cs(struct spi_device *spi, bool enable)
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{
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struct sun4i_spi *sspi = spi_master_get_devdata(spi->master);
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struct sun4i_spi *sspi = spi_controller_get_devdata(spi->controller);
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u32 reg;
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reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
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@ -201,11 +201,11 @@ static size_t sun4i_spi_max_transfer_size(struct spi_device *spi)
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return SUN4I_MAX_XFER_SIZE - 1;
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}
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static int sun4i_spi_transfer_one(struct spi_master *master,
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static int sun4i_spi_transfer_one(struct spi_controller *host,
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struct spi_device *spi,
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struct spi_transfer *tfr)
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{
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struct sun4i_spi *sspi = spi_master_get_devdata(master);
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struct sun4i_spi *sspi = spi_controller_get_devdata(host);
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unsigned int mclk_rate, div, timeout;
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unsigned int start, end, tx_time;
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unsigned int tx_len = 0;
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@ -331,7 +331,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
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msecs_to_jiffies(tx_time));
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end = jiffies;
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if (!timeout) {
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dev_warn(&master->dev,
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dev_warn(&host->dev,
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"%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
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dev_name(&spi->dev), tfr->len, tfr->speed_hz,
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jiffies_to_msecs(end - start), tx_time);
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@ -386,8 +386,8 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev_id)
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static int sun4i_spi_runtime_resume(struct device *dev)
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct sun4i_spi *sspi = spi_master_get_devdata(master);
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struct spi_controller *host = dev_get_drvdata(dev);
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struct sun4i_spi *sspi = spi_controller_get_devdata(host);
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int ret;
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ret = clk_prepare_enable(sspi->hclk);
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@ -415,8 +415,8 @@ out:
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static int sun4i_spi_runtime_suspend(struct device *dev)
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{
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struct spi_master *master = dev_get_drvdata(dev);
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struct sun4i_spi *sspi = spi_master_get_devdata(master);
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struct spi_controller *host = dev_get_drvdata(dev);
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struct sun4i_spi *sspi = spi_controller_get_devdata(host);
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clk_disable_unprepare(sspi->mclk);
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clk_disable_unprepare(sspi->hclk);
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@ -426,62 +426,62 @@ static int sun4i_spi_runtime_suspend(struct device *dev)
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static int sun4i_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct spi_controller *host;
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struct sun4i_spi *sspi;
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int ret = 0, irq;
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master = spi_alloc_master(&pdev->dev, sizeof(struct sun4i_spi));
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if (!master) {
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dev_err(&pdev->dev, "Unable to allocate SPI Master\n");
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host = spi_alloc_host(&pdev->dev, sizeof(struct sun4i_spi));
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if (!host) {
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dev_err(&pdev->dev, "Unable to allocate SPI Host\n");
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return -ENOMEM;
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}
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platform_set_drvdata(pdev, master);
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sspi = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, host);
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sspi = spi_controller_get_devdata(host);
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sspi->base_addr = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(sspi->base_addr)) {
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ret = PTR_ERR(sspi->base_addr);
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goto err_free_master;
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goto err_free_host;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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ret = -ENXIO;
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goto err_free_master;
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goto err_free_host;
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}
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ret = devm_request_irq(&pdev->dev, irq, sun4i_spi_handler,
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0, "sun4i-spi", sspi);
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if (ret) {
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dev_err(&pdev->dev, "Cannot request IRQ\n");
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goto err_free_master;
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goto err_free_host;
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}
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sspi->master = master;
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master->max_speed_hz = 100 * 1000 * 1000;
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master->min_speed_hz = 3 * 1000;
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master->set_cs = sun4i_spi_set_cs;
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master->transfer_one = sun4i_spi_transfer_one;
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master->num_chipselect = 4;
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->dev.of_node = pdev->dev.of_node;
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master->auto_runtime_pm = true;
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master->max_transfer_size = sun4i_spi_max_transfer_size;
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sspi->host = host;
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host->max_speed_hz = 100 * 1000 * 1000;
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host->min_speed_hz = 3 * 1000;
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host->set_cs = sun4i_spi_set_cs;
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host->transfer_one = sun4i_spi_transfer_one;
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host->num_chipselect = 4;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
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host->bits_per_word_mask = SPI_BPW_MASK(8);
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host->dev.of_node = pdev->dev.of_node;
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host->auto_runtime_pm = true;
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host->max_transfer_size = sun4i_spi_max_transfer_size;
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sspi->hclk = devm_clk_get(&pdev->dev, "ahb");
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if (IS_ERR(sspi->hclk)) {
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dev_err(&pdev->dev, "Unable to acquire AHB clock\n");
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ret = PTR_ERR(sspi->hclk);
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goto err_free_master;
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goto err_free_host;
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}
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sspi->mclk = devm_clk_get(&pdev->dev, "mod");
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if (IS_ERR(sspi->mclk)) {
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dev_err(&pdev->dev, "Unable to acquire module clock\n");
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ret = PTR_ERR(sspi->mclk);
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goto err_free_master;
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goto err_free_host;
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}
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init_completion(&sspi->done);
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@ -493,16 +493,16 @@ static int sun4i_spi_probe(struct platform_device *pdev)
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ret = sun4i_spi_runtime_resume(&pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "Couldn't resume the device\n");
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goto err_free_master;
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goto err_free_host;
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}
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pm_runtime_set_active(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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pm_runtime_idle(&pdev->dev);
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ret = devm_spi_register_master(&pdev->dev, master);
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ret = devm_spi_register_controller(&pdev->dev, host);
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if (ret) {
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dev_err(&pdev->dev, "cannot register SPI master\n");
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dev_err(&pdev->dev, "cannot register SPI host\n");
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goto err_pm_disable;
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}
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@ -511,8 +511,8 @@ static int sun4i_spi_probe(struct platform_device *pdev)
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err_pm_disable:
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pm_runtime_disable(&pdev->dev);
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sun4i_spi_runtime_suspend(&pdev->dev);
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err_free_master:
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spi_master_put(master);
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err_free_host:
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spi_controller_put(host);
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return ret;
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}
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