crypto: hisilicon/sec2 - updates the sec DFX function register
As the sec DFX function is enhanced, some RAS registers are added to the original DFX registers to enhance the DFX positioning function. Signed-off-by: Qi Tao <taoqi10@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -282,6 +282,11 @@ static const struct debugfs_reg32 sec_dfx_regs[] = {
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{"SEC_BD_SAA6 ", 0x301C38},
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{"SEC_BD_SAA6 ", 0x301C38},
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{"SEC_BD_SAA7 ", 0x301C3C},
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{"SEC_BD_SAA7 ", 0x301C3C},
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{"SEC_BD_SAA8 ", 0x301C40},
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{"SEC_BD_SAA8 ", 0x301C40},
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{"SEC_RAS_CE_ENABLE ", 0x301050},
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{"SEC_RAS_FE_ENABLE ", 0x301054},
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{"SEC_RAS_NFE_ENABLE ", 0x301058},
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{"SEC_REQ_TRNG_TIME_TH ", 0x30112C},
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{"SEC_CHANNEL_RNG_REQ_THLD ", 0x302110},
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};
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};
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/* define the SEC's dfx regs region and region length */
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/* define the SEC's dfx regs region and region length */
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