Preston_PLB
/
kernel-aes67
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

crypto: hisilicon/sec2 - updates the sec DFX function register 

As the sec DFX function is enhanced, some RAS registers are added
to the original DFX registers to enhance the DFX positioning function.

Signed-off-by: Qi Tao <taoqi10@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Qi Tao 2024-01-26 17:38:25 +08:00 committed by Herbert Xu
parent 4d314d2713
commit 68baa4289b
1 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/crypto/hisilicon/sec2/sec_main.c
View File

@ -282,6 +282,11 @@ static const struct debugfs_reg32 sec_dfx_regs[] = {
{"SEC_BD_SAA6 ", 0x301C38},
{"SEC_BD_SAA7 ", 0x301C3C},
{"SEC_BD_SAA8 ", 0x301C40},
{"SEC_RAS_CE_ENABLE ", 0x301050},
{"SEC_RAS_FE_ENABLE ", 0x301054},
{"SEC_RAS_NFE_ENABLE ", 0x301058},
{"SEC_REQ_TRNG_TIME_TH ", 0x30112C},
{"SEC_CHANNEL_RNG_REQ_THLD ", 0x302110},
};
/* define the SEC's dfx regs region and region length */