interconnect: qcom: x1e80100: Remove inexistent ACV_PERF BCM
Booting the kernel on X1E results in a message like:
[ 2.561524] qnoc-x1e80100 interconnect-0: ACV_PERF could not find RPMh address
And indeed, taking a look at cmd-db, no such BCM exists. Remove it.
Fixes: 9f19677284
("interconnect: qcom: Add X1E80100 interconnect provider driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Mike Tipton <quic_mdtipton@quicinc.com>
Link: https://lore.kernel.org/r/20240302-topic-faux_bcm_x1e-v1-1-c40fab7c4bc5@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
parent
5464e7acea
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@ -116,15 +116,6 @@ static struct qcom_icc_node xm_sdc2 = {
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.links = { X1E80100_SLAVE_A2NOC_SNOC },
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};
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static struct qcom_icc_node ddr_perf_mode_master = {
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.name = "ddr_perf_mode_master",
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.id = X1E80100_MASTER_DDR_PERF_MODE,
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.channels = 1,
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.buswidth = 4,
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.num_links = 1,
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.links = { X1E80100_SLAVE_DDR_PERF_MODE },
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};
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static struct qcom_icc_node qup0_core_master = {
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.name = "qup0_core_master",
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.id = X1E80100_MASTER_QUP_CORE_0,
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@ -832,14 +823,6 @@ static struct qcom_icc_node qns_a2noc_snoc = {
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.links = { X1E80100_MASTER_A2NOC_SNOC },
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};
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static struct qcom_icc_node ddr_perf_mode_slave = {
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.name = "ddr_perf_mode_slave",
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.id = X1E80100_SLAVE_DDR_PERF_MODE,
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.channels = 1,
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.buswidth = 4,
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.num_links = 0,
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};
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static struct qcom_icc_node qup0_core_slave = {
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.name = "qup0_core_slave",
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.id = X1E80100_SLAVE_QUP_CORE_0,
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@ -1591,12 +1574,6 @@ static struct qcom_icc_bcm bcm_acv = {
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.nodes = { &ebi },
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};
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static struct qcom_icc_bcm bcm_acv_perf = {
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.name = "ACV_PERF",
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.num_nodes = 1,
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.nodes = { &ddr_perf_mode_slave },
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};
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static struct qcom_icc_bcm bcm_ce0 = {
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.name = "CE0",
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.num_nodes = 1,
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@ -1863,18 +1840,15 @@ static const struct qcom_icc_desc x1e80100_aggre2_noc = {
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};
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static struct qcom_icc_bcm * const clk_virt_bcms[] = {
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&bcm_acv_perf,
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&bcm_qup0,
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&bcm_qup1,
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&bcm_qup2,
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};
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static struct qcom_icc_node * const clk_virt_nodes[] = {
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[MASTER_DDR_PERF_MODE] = &ddr_perf_mode_master,
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[MASTER_QUP_CORE_0] = &qup0_core_master,
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[MASTER_QUP_CORE_1] = &qup1_core_master,
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[MASTER_QUP_CORE_2] = &qup2_core_master,
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[SLAVE_DDR_PERF_MODE] = &ddr_perf_mode_slave,
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[SLAVE_QUP_CORE_0] = &qup0_core_slave,
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[SLAVE_QUP_CORE_1] = &qup1_core_slave,
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[SLAVE_QUP_CORE_2] = &qup2_core_slave,
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