kvm: x86: add host poll control msrs
Add an MSRs which allows the guest to disable host polling (specifically the cpuidle-haltpoll, when performing polling in the guest, disables host side polling). Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -273,3 +273,12 @@ MSR_KVM_EOI_EN: 0x4b564d04
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guest must both read the least significant bit in the memory area and
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clear it using a single CPU instruction, such as test and clear, or
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compare and exchange.
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MSR_KVM_POLL_CONTROL: 0x4b564d05
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Control host-side polling.
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data: Bit 0 enables (1) or disables (0) host-side HLT polling logic.
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KVM guests can request the host not to poll on HLT, for example if
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they are performing polling themselves.
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@ -755,6 +755,8 @@ struct kvm_vcpu_arch {
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struct gfn_to_hva_cache data;
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} pv_eoi;
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u64 msr_kvm_poll_control;
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/*
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* Indicate whether the access faults on its page table in guest
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* which is set when fix page fault and used to detect unhandeable
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@ -29,6 +29,7 @@
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#define KVM_FEATURE_PV_TLB_FLUSH 9
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#define KVM_FEATURE_ASYNC_PF_VMEXIT 10
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#define KVM_FEATURE_PV_SEND_IPI 11
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#define KVM_FEATURE_POLL_CONTROL 12
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#define KVM_HINTS_REALTIME 0
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@ -47,6 +48,7 @@
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#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
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#define MSR_KVM_STEAL_TIME 0x4b564d03
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#define MSR_KVM_PV_EOI_EN 0x4b564d04
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#define MSR_KVM_POLL_CONTROL 0x4b564d05
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struct kvm_steal_time {
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__u64 steal;
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@ -41,6 +41,7 @@ config KVM
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select PERF_EVENTS
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select HAVE_KVM_MSI
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select HAVE_KVM_CPU_RELAX_INTERCEPT
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select HAVE_KVM_NO_POLL
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select KVM_GENERIC_DIRTYLOG_READ_PROTECT
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select KVM_VFIO
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select SRCU
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@ -658,7 +658,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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(1 << KVM_FEATURE_PV_UNHALT) |
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(1 << KVM_FEATURE_PV_TLB_FLUSH) |
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(1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
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(1 << KVM_FEATURE_PV_SEND_IPI);
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(1 << KVM_FEATURE_PV_SEND_IPI) |
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(1 << KVM_FEATURE_POLL_CONTROL);
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if (sched_info_on())
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entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
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@ -1177,6 +1177,7 @@ static u32 emulated_msrs[] = {
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MSR_IA32_POWER_CTL,
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MSR_K7_HWCR,
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MSR_KVM_POLL_CONTROL,
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};
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static unsigned num_emulated_msrs;
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@ -2636,6 +2637,14 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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return 1;
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break;
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case MSR_KVM_POLL_CONTROL:
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/* only enable bit supported */
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if (data & (-1ULL << 1))
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return 1;
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vcpu->arch.msr_kvm_poll_control = data;
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break;
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case MSR_IA32_MCG_CTL:
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case MSR_IA32_MCG_STATUS:
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case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
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@ -2885,6 +2894,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_KVM_PV_EOI_EN:
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msr_info->data = vcpu->arch.pv_eoi.msr_val;
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break;
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case MSR_KVM_POLL_CONTROL:
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msr_info->data = vcpu->arch.msr_kvm_poll_control;
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break;
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case MSR_IA32_P5_MC_ADDR:
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case MSR_IA32_P5_MC_TYPE:
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case MSR_IA32_MCG_CAP:
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@ -8861,6 +8873,10 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
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msr.host_initiated = true;
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kvm_write_tsc(vcpu, &msr);
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vcpu_put(vcpu);
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/* poll control enabled by default */
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vcpu->arch.msr_kvm_poll_control = 1;
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mutex_unlock(&vcpu->mutex);
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if (!kvmclock_periodic_sync)
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@ -9972,6 +9988,13 @@ bool kvm_vector_hashing_enabled(void)
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}
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EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
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bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
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{
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return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
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}
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EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
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