hwmon: (pmbus/ucd9000) Increase delay from 250 to 500us
Following the failure observed with a delay of 250us, experiments were
conducted with various delays. It was found that a delay of 350us
effectively mitigated the issue.
To provide a more optimal solution while still allowing a margin for
stability, the delay is being adjusted to 500us.
Signed-off-by: Lakshmi Yadlapati <lakshmiy@us.ibm.com>
Link: https://lore.kernel.org/r/20240507194603.1305750-1-lakshmiy@us.ibm.com
Fixes: 8d655e6523
("hwmon: (ucd90320) Add minimum delay between bus accesses")
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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@ -80,11 +80,11 @@ struct ucd9000_debugfs_entry {
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* It has been observed that the UCD90320 randomly fails register access when
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* It has been observed that the UCD90320 randomly fails register access when
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* doing another access right on the back of a register write. To mitigate this
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* doing another access right on the back of a register write. To mitigate this
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* make sure that there is a minimum delay between a write access and the
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* make sure that there is a minimum delay between a write access and the
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* following access. The 250us is based on experimental data. At a delay of
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* following access. The 500 is based on experimental data. At a delay of
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* 200us the issue seems to go away. Add a bit of extra margin to allow for
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* 350us the issue seems to go away. Add a bit of extra margin to allow for
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* system to system differences.
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* system to system differences.
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*/
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*/
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#define UCD90320_WAIT_DELAY_US 250
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#define UCD90320_WAIT_DELAY_US 500
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static inline void ucd90320_wait(const struct ucd9000_data *data)
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static inline void ucd90320_wait(const struct ucd9000_data *data)
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{
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{
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