2019-05-27 02:55:06 -04:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2015-07-01 09:11:32 -04:00
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/*
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2017-04-03 10:46:40 -04:00
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* Core, IRQ and I2C device driver for DA9061 and DA9062 PMICs
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* Copyright (C) 2015-2017 Dialog Semiconductor
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2015-07-01 09:11:32 -04:00
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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2023-07-14 13:47:27 -04:00
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#include <linux/of.h>
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2015-07-01 09:11:32 -04:00
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#include <linux/regmap.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/i2c.h>
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#include <linux/mfd/da9062/core.h>
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#include <linux/mfd/da9062/registers.h>
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#include <linux/regulator/of_regulator.h>
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#define DA9062_REG_EVENT_A_OFFSET 0
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#define DA9062_REG_EVENT_B_OFFSET 1
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#define DA9062_REG_EVENT_C_OFFSET 2
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2020-02-25 20:07:22 -05:00
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#define DA9062_IRQ_LOW 0
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#define DA9062_IRQ_HIGH 1
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2017-04-03 10:46:40 -04:00
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static struct regmap_irq da9061_irqs[] = {
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/* EVENT A */
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[DA9061_IRQ_ONKEY] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_NONKEY_MASK,
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},
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[DA9061_IRQ_WDG_WARN] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_WDG_WARN_MASK,
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},
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[DA9061_IRQ_SEQ_RDY] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_SEQ_RDY_MASK,
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},
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/* EVENT B */
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[DA9061_IRQ_TEMP] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_TEMP_MASK,
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},
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[DA9061_IRQ_LDO_LIM] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_LDO_LIM_MASK,
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},
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[DA9061_IRQ_DVC_RDY] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_DVC_RDY_MASK,
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},
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[DA9061_IRQ_VDD_WARN] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_VDD_WARN_MASK,
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},
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/* EVENT C */
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[DA9061_IRQ_GPI0] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI0_MASK,
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},
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[DA9061_IRQ_GPI1] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI1_MASK,
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},
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[DA9061_IRQ_GPI2] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI2_MASK,
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},
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[DA9061_IRQ_GPI3] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI3_MASK,
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},
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[DA9061_IRQ_GPI4] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI4_MASK,
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},
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};
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static struct regmap_irq_chip da9061_irq_chip = {
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.name = "da9061-irq",
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.irqs = da9061_irqs,
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.num_irqs = DA9061_NUM_IRQ,
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.num_regs = 3,
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.status_base = DA9062AA_EVENT_A,
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.mask_base = DA9062AA_IRQ_MASK_A,
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.ack_base = DA9062AA_EVENT_A,
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};
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2015-07-01 09:11:32 -04:00
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static struct regmap_irq da9062_irqs[] = {
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/* EVENT A */
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[DA9062_IRQ_ONKEY] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_NONKEY_MASK,
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},
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[DA9062_IRQ_ALARM] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_ALARM_MASK,
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},
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[DA9062_IRQ_TICK] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_TICK_MASK,
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},
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[DA9062_IRQ_WDG_WARN] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_WDG_WARN_MASK,
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},
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[DA9062_IRQ_SEQ_RDY] = {
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.reg_offset = DA9062_REG_EVENT_A_OFFSET,
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.mask = DA9062AA_M_SEQ_RDY_MASK,
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},
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/* EVENT B */
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[DA9062_IRQ_TEMP] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_TEMP_MASK,
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},
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[DA9062_IRQ_LDO_LIM] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_LDO_LIM_MASK,
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},
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[DA9062_IRQ_DVC_RDY] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_DVC_RDY_MASK,
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},
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[DA9062_IRQ_VDD_WARN] = {
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.reg_offset = DA9062_REG_EVENT_B_OFFSET,
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.mask = DA9062AA_M_VDD_WARN_MASK,
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},
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/* EVENT C */
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[DA9062_IRQ_GPI0] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI0_MASK,
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},
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[DA9062_IRQ_GPI1] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI1_MASK,
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},
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[DA9062_IRQ_GPI2] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI2_MASK,
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},
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[DA9062_IRQ_GPI3] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI3_MASK,
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},
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[DA9062_IRQ_GPI4] = {
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.reg_offset = DA9062_REG_EVENT_C_OFFSET,
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.mask = DA9062AA_M_GPI4_MASK,
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},
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};
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static struct regmap_irq_chip da9062_irq_chip = {
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.name = "da9062-irq",
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.irqs = da9062_irqs,
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.num_irqs = DA9062_NUM_IRQ,
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.num_regs = 3,
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.status_base = DA9062AA_EVENT_A,
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.mask_base = DA9062AA_IRQ_MASK_A,
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.ack_base = DA9062AA_EVENT_A,
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9061_core_resources[] = {
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2017-04-03 10:46:40 -04:00
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DEFINE_RES_IRQ_NAMED(DA9061_IRQ_VDD_WARN, "VDD_WARN"),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9061_regulators_resources[] = {
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2017-04-03 10:46:40 -04:00
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DEFINE_RES_IRQ_NAMED(DA9061_IRQ_LDO_LIM, "LDO_LIM"),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9061_thermal_resources[] = {
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2017-04-03 10:46:40 -04:00
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DEFINE_RES_IRQ_NAMED(DA9061_IRQ_TEMP, "THERMAL"),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9061_wdt_resources[] = {
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2017-04-03 10:46:40 -04:00
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DEFINE_RES_IRQ_NAMED(DA9061_IRQ_WDG_WARN, "WD_WARN"),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9061_onkey_resources[] = {
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2017-04-03 10:46:40 -04:00
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DEFINE_RES_IRQ_NAMED(DA9061_IRQ_ONKEY, "ONKEY"),
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};
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2023-03-09 04:22:53 -05:00
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static const struct mfd_cell da9061_devs_irq[] = {
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2023-03-09 04:22:52 -05:00
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MFD_CELL_OF("da9061-core", da9061_core_resources, NULL, 0, 0,
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NULL),
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MFD_CELL_OF("da9062-regulators", da9061_regulators_resources, NULL, 0, 0,
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NULL),
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MFD_CELL_OF("da9061-watchdog", da9061_wdt_resources, NULL, 0, 0,
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"dlg,da9061-watchdog"),
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MFD_CELL_OF("da9061-thermal", da9061_thermal_resources, NULL, 0, 0,
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"dlg,da9061-thermal"),
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MFD_CELL_OF("da9061-onkey", da9061_onkey_resources, NULL, 0, 0,
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"dlg,da9061-onkey"),
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2017-04-03 10:46:40 -04:00
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};
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2023-03-09 04:22:53 -05:00
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static const struct mfd_cell da9061_devs_noirq[] = {
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MFD_CELL_OF("da9061-core", NULL, NULL, 0, 0, NULL),
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MFD_CELL_OF("da9062-regulators", NULL, NULL, 0, 0, NULL),
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MFD_CELL_OF("da9061-watchdog", NULL, NULL, 0, 0, "dlg,da9061-watchdog"),
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MFD_CELL_OF("da9061-thermal", NULL, NULL, 0, 0, "dlg,da9061-thermal"),
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MFD_CELL_OF("da9061-onkey", NULL, NULL, 0, 0, "dlg,da9061-onkey"),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_core_resources[] = {
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2015-07-01 09:11:32 -04:00
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DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_regulators_resources[] = {
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2015-07-01 09:11:32 -04:00
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DEFINE_RES_NAMED(DA9062_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_thermal_resources[] = {
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2015-07-01 09:11:32 -04:00
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DEFINE_RES_NAMED(DA9062_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_wdt_resources[] = {
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2015-07-01 09:11:32 -04:00
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DEFINE_RES_NAMED(DA9062_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_rtc_resources[] = {
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2015-07-21 06:29:06 -04:00
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DEFINE_RES_NAMED(DA9062_IRQ_ALARM, 1, "ALARM", IORESOURCE_IRQ),
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DEFINE_RES_NAMED(DA9062_IRQ_TICK, 1, "TICK", IORESOURCE_IRQ),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_onkey_resources[] = {
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2015-07-23 12:17:41 -04:00
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DEFINE_RES_NAMED(DA9062_IRQ_ONKEY, 1, "ONKEY", IORESOURCE_IRQ),
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};
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2020-09-22 15:26:52 -04:00
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static const struct resource da9062_gpio_resources[] = {
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2019-12-12 11:04:12 -05:00
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DEFINE_RES_NAMED(DA9062_IRQ_GPI0, 1, "GPI0", IORESOURCE_IRQ),
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DEFINE_RES_NAMED(DA9062_IRQ_GPI1, 1, "GPI1", IORESOURCE_IRQ),
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DEFINE_RES_NAMED(DA9062_IRQ_GPI2, 1, "GPI2", IORESOURCE_IRQ),
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DEFINE_RES_NAMED(DA9062_IRQ_GPI3, 1, "GPI3", IORESOURCE_IRQ),
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DEFINE_RES_NAMED(DA9062_IRQ_GPI4, 1, "GPI4", IORESOURCE_IRQ),
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};
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2023-03-09 04:22:53 -05:00
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static const struct mfd_cell da9062_devs_irq[] = {
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2023-03-09 04:22:52 -05:00
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MFD_CELL_OF("da9062-core", da9062_core_resources, NULL, 0, 0,
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NULL),
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MFD_CELL_OF("da9062-regulators", da9062_regulators_resources, NULL, 0, 0,
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NULL),
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MFD_CELL_OF("da9062-watchdog", da9062_wdt_resources, NULL, 0, 0,
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"dlg,da9062-watchdog"),
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MFD_CELL_OF("da9062-thermal", da9062_thermal_resources, NULL, 0, 0,
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"dlg,da9062-thermal"),
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MFD_CELL_OF("da9062-rtc", da9062_rtc_resources, NULL, 0, 0,
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"dlg,da9062-rtc"),
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MFD_CELL_OF("da9062-onkey", da9062_onkey_resources, NULL, 0, 0,
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"dlg,da9062-onkey"),
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MFD_CELL_OF("da9062-gpio", da9062_gpio_resources, NULL, 0, 0,
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"dlg,da9062-gpio"),
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2015-07-01 09:11:32 -04:00
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};
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2023-03-09 04:22:53 -05:00
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static const struct mfd_cell da9062_devs_noirq[] = {
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MFD_CELL_OF("da9062-core", NULL, NULL, 0, 0, NULL),
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MFD_CELL_OF("da9062-regulators", NULL, NULL, 0, 0, NULL),
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MFD_CELL_OF("da9062-watchdog", NULL, NULL, 0, 0, "dlg,da9062-watchdog"),
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MFD_CELL_OF("da9062-thermal", NULL, NULL, 0, 0, "dlg,da9062-thermal"),
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MFD_CELL_OF("da9062-rtc", NULL, NULL, 0, 0, "dlg,da9062-rtc"),
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MFD_CELL_OF("da9062-onkey", NULL, NULL, 0, 0, "dlg,da9062-onkey"),
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MFD_CELL_OF("da9062-gpio", NULL, NULL, 0, 0, "dlg,da9062-gpio"),
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};
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2015-07-01 09:11:32 -04:00
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static int da9062_clear_fault_log(struct da9062 *chip)
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{
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int ret;
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int fault_log;
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ret = regmap_read(chip->regmap, DA9062AA_FAULT_LOG, &fault_log);
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if (ret < 0)
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return ret;
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if (fault_log) {
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if (fault_log & DA9062AA_TWD_ERROR_MASK)
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dev_dbg(chip->dev, "Fault log entry detected: TWD_ERROR\n");
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if (fault_log & DA9062AA_POR_MASK)
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dev_dbg(chip->dev, "Fault log entry detected: POR\n");
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if (fault_log & DA9062AA_VDD_FAULT_MASK)
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dev_dbg(chip->dev, "Fault log entry detected: VDD_FAULT\n");
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if (fault_log & DA9062AA_VDD_START_MASK)
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dev_dbg(chip->dev, "Fault log entry detected: VDD_START\n");
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if (fault_log & DA9062AA_TEMP_CRIT_MASK)
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dev_dbg(chip->dev, "Fault log entry detected: TEMP_CRIT\n");
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|
|
if (fault_log & DA9062AA_KEY_RESET_MASK)
|
|
|
|
dev_dbg(chip->dev, "Fault log entry detected: KEY_RESET\n");
|
|
|
|
if (fault_log & DA9062AA_NSHUTDOWN_MASK)
|
|
|
|
dev_dbg(chip->dev, "Fault log entry detected: NSHUTDOWN\n");
|
|
|
|
if (fault_log & DA9062AA_WAIT_SHUT_MASK)
|
|
|
|
dev_dbg(chip->dev, "Fault log entry detected: WAIT_SHUT\n");
|
|
|
|
|
|
|
|
ret = regmap_write(chip->regmap, DA9062AA_FAULT_LOG,
|
|
|
|
fault_log);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-10-09 06:22:03 -04:00
|
|
|
static int da9062_get_device_type(struct da9062 *chip)
|
2015-07-01 09:11:32 -04:00
|
|
|
{
|
2017-04-03 10:46:40 -04:00
|
|
|
int device_id, variant_id, variant_mrc, variant_vrc;
|
|
|
|
char *type;
|
2015-07-01 09:11:32 -04:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(chip->dev, "Cannot read chip ID.\n");
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
if (device_id != DA9062_PMIC_DEVICE_ID) {
|
|
|
|
dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = regmap_read(chip->regmap, DA9062AA_VARIANT_ID, &variant_id);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(chip->dev, "Cannot read chip variant id.\n");
|
|
|
|
return -EIO;
|
|
|
|
}
|
|
|
|
|
2017-04-03 10:46:40 -04:00
|
|
|
variant_vrc = (variant_id & DA9062AA_VRC_MASK) >> DA9062AA_VRC_SHIFT;
|
|
|
|
|
|
|
|
switch (variant_vrc) {
|
|
|
|
case DA9062_PMIC_VARIANT_VRC_DA9061:
|
|
|
|
type = "DA9061";
|
|
|
|
break;
|
|
|
|
case DA9062_PMIC_VARIANT_VRC_DA9062:
|
|
|
|
type = "DA9062";
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
type = "Unknown";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2015-07-01 09:11:32 -04:00
|
|
|
dev_info(chip->dev,
|
2017-04-03 10:46:40 -04:00
|
|
|
"Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n",
|
|
|
|
device_id, variant_id, type);
|
2015-07-01 09:11:32 -04:00
|
|
|
|
|
|
|
variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT;
|
|
|
|
|
|
|
|
if (variant_mrc < DA9062_PMIC_VARIANT_MRC_AA) {
|
|
|
|
dev_err(chip->dev,
|
|
|
|
"Cannot support variant MRC: 0x%02X\n", variant_mrc);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2020-02-25 20:07:22 -05:00
|
|
|
static u32 da9062_configure_irq_type(struct da9062 *chip, int irq, u32 *trigger)
|
|
|
|
{
|
|
|
|
u32 irq_type = 0;
|
|
|
|
struct irq_data *irq_data = irq_get_irq_data(irq);
|
|
|
|
|
|
|
|
if (!irq_data) {
|
|
|
|
dev_err(chip->dev, "Invalid IRQ: %d\n", irq);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
*trigger = irqd_get_trigger_type(irq_data);
|
|
|
|
|
|
|
|
switch (*trigger) {
|
|
|
|
case IRQ_TYPE_LEVEL_HIGH:
|
|
|
|
irq_type = DA9062_IRQ_HIGH;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_LEVEL_LOW:
|
|
|
|
irq_type = DA9062_IRQ_LOW;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_warn(chip->dev, "Unsupported IRQ type: %d\n", *trigger);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return regmap_update_bits(chip->regmap, DA9062AA_CONFIG_A,
|
|
|
|
DA9062AA_IRQ_TYPE_MASK,
|
|
|
|
irq_type << DA9062AA_IRQ_TYPE_SHIFT);
|
|
|
|
}
|
|
|
|
|
2017-04-03 10:46:40 -04:00
|
|
|
static const struct regmap_range da9061_aa_readable_ranges[] = {
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B),
|
|
|
|
regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C),
|
|
|
|
regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4),
|
|
|
|
regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_GPIO_OUT3_4),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK1_CONT, DA9062AA_BUCK4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3),
|
|
|
|
regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15),
|
|
|
|
regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_WAIT),
|
|
|
|
regmap_reg_range(DA9062AA_RESET, DA9062AA_BUCK_ILIM_C),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK1_CFG, DA9062AA_BUCK3_CFG),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK1_A, DA9062AA_VBUCK4_A),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A),
|
2020-02-25 20:07:22 -05:00
|
|
|
regmap_reg_range(DA9062AA_CONFIG_A, DA9062AA_CONFIG_A),
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_VBUCK1_B, DA9062AA_VBUCK4_B),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B),
|
|
|
|
regmap_reg_range(DA9062AA_INTERFACE, DA9062AA_CONFIG_E),
|
|
|
|
regmap_reg_range(DA9062AA_CONFIG_G, DA9062AA_CONFIG_K),
|
|
|
|
regmap_reg_range(DA9062AA_CONFIG_M, DA9062AA_CONFIG_M),
|
|
|
|
regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19),
|
|
|
|
regmap_reg_range(DA9062AA_DEVICE_ID, DA9062AA_CONFIG_ID),
|
2017-04-03 10:46:40 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_range da9061_aa_writeable_ranges[] = {
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_PAGE_CON),
|
|
|
|
regmap_reg_range(DA9062AA_FAULT_LOG, DA9062AA_EVENT_C),
|
|
|
|
regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4),
|
|
|
|
regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_GPIO_OUT3_4),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK1_CONT, DA9062AA_BUCK4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3),
|
|
|
|
regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15),
|
|
|
|
regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_WAIT),
|
|
|
|
regmap_reg_range(DA9062AA_RESET, DA9062AA_BUCK_ILIM_C),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK1_CFG, DA9062AA_BUCK3_CFG),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK1_A, DA9062AA_VBUCK4_A),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A),
|
2020-02-25 20:07:22 -05:00
|
|
|
regmap_reg_range(DA9062AA_CONFIG_A, DA9062AA_CONFIG_A),
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_VBUCK1_B, DA9062AA_VBUCK4_B),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B),
|
2022-09-15 05:20:04 -04:00
|
|
|
regmap_reg_range(DA9062AA_CONFIG_J, DA9062AA_CONFIG_J),
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19),
|
2017-04-03 10:46:40 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_range da9061_aa_volatile_ranges[] = {
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B),
|
|
|
|
regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_CONTROL_B),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_E, DA9062AA_CONTROL_F),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK1_CONT, DA9062AA_BUCK4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ, DA9062AA_SEQ),
|
2017-04-03 10:46:40 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_access_table da9061_aa_readable_table = {
|
|
|
|
.yes_ranges = da9061_aa_readable_ranges,
|
|
|
|
.n_yes_ranges = ARRAY_SIZE(da9061_aa_readable_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_access_table da9061_aa_writeable_table = {
|
|
|
|
.yes_ranges = da9061_aa_writeable_ranges,
|
|
|
|
.n_yes_ranges = ARRAY_SIZE(da9061_aa_writeable_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_access_table da9061_aa_volatile_table = {
|
|
|
|
.yes_ranges = da9061_aa_volatile_ranges,
|
|
|
|
.n_yes_ranges = ARRAY_SIZE(da9061_aa_volatile_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_range_cfg da9061_range_cfg[] = {
|
|
|
|
{
|
|
|
|
.range_min = DA9062AA_PAGE_CON,
|
|
|
|
.range_max = DA9062AA_CONFIG_ID,
|
|
|
|
.selector_reg = DA9062AA_PAGE_CON,
|
|
|
|
.selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,
|
|
|
|
.selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,
|
|
|
|
.window_start = 0,
|
|
|
|
.window_len = 256,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct regmap_config da9061_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.ranges = da9061_range_cfg,
|
|
|
|
.num_ranges = ARRAY_SIZE(da9061_range_cfg),
|
|
|
|
.max_register = DA9062AA_CONFIG_ID,
|
2024-02-06 02:13:03 -05:00
|
|
|
.cache_type = REGCACHE_MAPLE,
|
2017-04-03 10:46:40 -04:00
|
|
|
.rd_table = &da9061_aa_readable_table,
|
|
|
|
.wr_table = &da9061_aa_writeable_table,
|
|
|
|
.volatile_table = &da9061_aa_volatile_table,
|
|
|
|
};
|
|
|
|
|
2015-07-01 09:11:32 -04:00
|
|
|
static const struct regmap_range da9062_aa_readable_ranges[] = {
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B),
|
|
|
|
regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C),
|
|
|
|
regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4),
|
|
|
|
regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_BUCK4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1),
|
|
|
|
regmap_reg_range(DA9062AA_COUNT_S, DA9062AA_SECOND_D),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3),
|
|
|
|
regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15),
|
|
|
|
regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_BUCK3_CFG),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK2_A, DA9062AA_VBUCK4_A),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK2_B, DA9062AA_VBUCK4_B),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B),
|
|
|
|
regmap_reg_range(DA9062AA_BBAT_CONT, DA9062AA_BBAT_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_INTERFACE, DA9062AA_CONFIG_E),
|
|
|
|
regmap_reg_range(DA9062AA_CONFIG_G, DA9062AA_CONFIG_K),
|
|
|
|
regmap_reg_range(DA9062AA_CONFIG_M, DA9062AA_CONFIG_M),
|
|
|
|
regmap_reg_range(DA9062AA_TRIM_CLDR, DA9062AA_GP_ID_19),
|
|
|
|
regmap_reg_range(DA9062AA_DEVICE_ID, DA9062AA_CONFIG_ID),
|
2015-07-01 09:11:32 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_range da9062_aa_writeable_ranges[] = {
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_PAGE_CON),
|
|
|
|
regmap_reg_range(DA9062AA_FAULT_LOG, DA9062AA_EVENT_C),
|
|
|
|
regmap_reg_range(DA9062AA_IRQ_MASK_A, DA9062AA_IRQ_MASK_C),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_GPIO_4),
|
|
|
|
regmap_reg_range(DA9062AA_GPIO_WKUP_MODE, DA9062AA_BUCK4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1),
|
|
|
|
regmap_reg_range(DA9062AA_COUNT_S, DA9062AA_ALARM_Y),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ, DA9062AA_ID_4_3),
|
|
|
|
regmap_reg_range(DA9062AA_ID_12_11, DA9062AA_ID_16_15),
|
|
|
|
regmap_reg_range(DA9062AA_ID_22_21, DA9062AA_ID_32_31),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ_A, DA9062AA_BUCK3_CFG),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK2_A, DA9062AA_VBUCK4_A),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_A, DA9062AA_VBUCK3_A),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_A, DA9062AA_VLDO4_A),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK2_B, DA9062AA_VBUCK4_B),
|
|
|
|
regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B),
|
|
|
|
regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B),
|
|
|
|
regmap_reg_range(DA9062AA_BBAT_CONT, DA9062AA_BBAT_CONT),
|
2021-11-24 01:51:19 -05:00
|
|
|
regmap_reg_range(DA9062AA_CONFIG_J, DA9062AA_CONFIG_J),
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19),
|
2015-07-01 09:11:32 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_range da9062_aa_volatile_ranges[] = {
|
2018-03-28 07:03:09 -04:00
|
|
|
regmap_reg_range(DA9062AA_PAGE_CON, DA9062AA_STATUS_B),
|
|
|
|
regmap_reg_range(DA9062AA_STATUS_D, DA9062AA_EVENT_C),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_A, DA9062AA_CONTROL_B),
|
|
|
|
regmap_reg_range(DA9062AA_CONTROL_E, DA9062AA_CONTROL_F),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK2_CONT, DA9062AA_BUCK4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_BUCK3_CONT, DA9062AA_BUCK3_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_LDO1_CONT, DA9062AA_LDO4_CONT),
|
|
|
|
regmap_reg_range(DA9062AA_DVC_1, DA9062AA_DVC_1),
|
|
|
|
regmap_reg_range(DA9062AA_COUNT_S, DA9062AA_SECOND_D),
|
|
|
|
regmap_reg_range(DA9062AA_SEQ, DA9062AA_SEQ),
|
|
|
|
regmap_reg_range(DA9062AA_EN_32K, DA9062AA_EN_32K),
|
2015-07-01 09:11:32 -04:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_access_table da9062_aa_readable_table = {
|
|
|
|
.yes_ranges = da9062_aa_readable_ranges,
|
|
|
|
.n_yes_ranges = ARRAY_SIZE(da9062_aa_readable_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_access_table da9062_aa_writeable_table = {
|
|
|
|
.yes_ranges = da9062_aa_writeable_ranges,
|
|
|
|
.n_yes_ranges = ARRAY_SIZE(da9062_aa_writeable_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_access_table da9062_aa_volatile_table = {
|
|
|
|
.yes_ranges = da9062_aa_volatile_ranges,
|
|
|
|
.n_yes_ranges = ARRAY_SIZE(da9062_aa_volatile_ranges),
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct regmap_range_cfg da9062_range_cfg[] = {
|
|
|
|
{
|
|
|
|
.range_min = DA9062AA_PAGE_CON,
|
|
|
|
.range_max = DA9062AA_CONFIG_ID,
|
|
|
|
.selector_reg = DA9062AA_PAGE_CON,
|
|
|
|
.selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT,
|
|
|
|
.selector_shift = DA9062_I2C_PAGE_SEL_SHIFT,
|
|
|
|
.window_start = 0,
|
|
|
|
.window_len = 256,
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct regmap_config da9062_regmap_config = {
|
|
|
|
.reg_bits = 8,
|
|
|
|
.val_bits = 8,
|
|
|
|
.ranges = da9062_range_cfg,
|
|
|
|
.num_ranges = ARRAY_SIZE(da9062_range_cfg),
|
|
|
|
.max_register = DA9062AA_CONFIG_ID,
|
2024-02-06 02:13:03 -05:00
|
|
|
.cache_type = REGCACHE_MAPLE,
|
2015-07-01 09:11:32 -04:00
|
|
|
.rd_table = &da9062_aa_readable_table,
|
|
|
|
.wr_table = &da9062_aa_writeable_table,
|
|
|
|
.volatile_table = &da9062_aa_volatile_table,
|
|
|
|
};
|
|
|
|
|
2022-11-18 17:42:42 -05:00
|
|
|
static int da9062_i2c_probe(struct i2c_client *i2c)
|
2015-07-01 09:11:32 -04:00
|
|
|
{
|
|
|
|
struct da9062 *chip;
|
2023-03-09 04:22:53 -05:00
|
|
|
unsigned int irq_base = 0;
|
2017-04-03 10:46:40 -04:00
|
|
|
const struct mfd_cell *cell;
|
|
|
|
const struct regmap_irq_chip *irq_chip;
|
|
|
|
const struct regmap_config *config;
|
|
|
|
int cell_num;
|
2020-02-25 20:07:22 -05:00
|
|
|
u32 trigger_type = 0;
|
2015-07-01 09:11:32 -04:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL);
|
|
|
|
if (!chip)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2023-12-04 07:45:07 -05:00
|
|
|
chip->chip_type = (uintptr_t)i2c_get_match_data(i2c);
|
2017-04-03 10:46:40 -04:00
|
|
|
|
2015-07-01 09:11:32 -04:00
|
|
|
i2c_set_clientdata(i2c, chip);
|
|
|
|
chip->dev = &i2c->dev;
|
|
|
|
|
2023-03-09 04:22:53 -05:00
|
|
|
/* Start with a base configuration without IRQ */
|
2017-04-03 10:46:40 -04:00
|
|
|
switch (chip->chip_type) {
|
|
|
|
case COMPAT_TYPE_DA9061:
|
2023-03-09 04:22:53 -05:00
|
|
|
cell = da9061_devs_noirq;
|
|
|
|
cell_num = ARRAY_SIZE(da9061_devs_noirq);
|
2017-04-03 10:46:40 -04:00
|
|
|
config = &da9061_regmap_config;
|
|
|
|
break;
|
|
|
|
case COMPAT_TYPE_DA9062:
|
2023-03-09 04:22:53 -05:00
|
|
|
cell = da9062_devs_noirq;
|
|
|
|
cell_num = ARRAY_SIZE(da9062_devs_noirq);
|
2017-04-03 10:46:40 -04:00
|
|
|
config = &da9062_regmap_config;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(chip->dev, "Unrecognised chip type\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
chip->regmap = devm_regmap_init_i2c(i2c, config);
|
2015-07-01 09:11:32 -04:00
|
|
|
if (IS_ERR(chip->regmap)) {
|
|
|
|
ret = PTR_ERR(chip->regmap);
|
|
|
|
dev_err(chip->dev, "Failed to allocate register map: %d\n",
|
|
|
|
ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2021-11-24 01:51:19 -05:00
|
|
|
/* If SMBus is not available and only I2C is possible, enter I2C mode */
|
|
|
|
if (i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C)) {
|
|
|
|
dev_info(chip->dev, "Entering I2C mode!\n");
|
|
|
|
ret = regmap_clear_bits(chip->regmap, DA9062AA_CONFIG_J,
|
|
|
|
DA9062AA_TWOWIRE_TO_MASK);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(chip->dev, "Failed to set Two-Wire Bus Mode.\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-07-01 09:11:32 -04:00
|
|
|
ret = da9062_clear_fault_log(chip);
|
|
|
|
if (ret < 0)
|
|
|
|
dev_warn(chip->dev, "Cannot clear fault log\n");
|
|
|
|
|
2015-10-09 06:22:03 -04:00
|
|
|
ret = da9062_get_device_type(chip);
|
2015-07-01 09:11:32 -04:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2023-03-09 04:22:53 -05:00
|
|
|
/* If IRQ is available, reconfigure it accordingly */
|
|
|
|
if (i2c->irq) {
|
|
|
|
if (chip->chip_type == COMPAT_TYPE_DA9061) {
|
|
|
|
cell = da9061_devs_irq;
|
|
|
|
cell_num = ARRAY_SIZE(da9061_devs_irq);
|
|
|
|
irq_chip = &da9061_irq_chip;
|
|
|
|
} else {
|
|
|
|
cell = da9062_devs_irq;
|
|
|
|
cell_num = ARRAY_SIZE(da9062_devs_irq);
|
|
|
|
irq_chip = &da9062_irq_chip;
|
|
|
|
}
|
2020-02-25 20:07:22 -05:00
|
|
|
|
2023-03-09 04:22:53 -05:00
|
|
|
ret = da9062_configure_irq_type(chip, i2c->irq, &trigger_type);
|
|
|
|
if (ret < 0) {
|
|
|
|
dev_err(chip->dev, "Failed to configure IRQ type\n");
|
|
|
|
return ret;
|
|
|
|
}
|
2015-07-01 09:11:32 -04:00
|
|
|
|
2023-03-09 04:22:53 -05:00
|
|
|
ret = regmap_add_irq_chip(chip->regmap, i2c->irq,
|
|
|
|
trigger_type | IRQF_SHARED | IRQF_ONESHOT,
|
|
|
|
-1, irq_chip, &chip->regmap_irq);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(chip->dev, "Failed to request IRQ %d: %d\n",
|
|
|
|
i2c->irq, ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
irq_base = regmap_irq_chip_get_base(chip->regmap_irq);
|
|
|
|
}
|
2015-07-01 09:11:32 -04:00
|
|
|
|
2017-04-03 10:46:40 -04:00
|
|
|
ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, cell,
|
|
|
|
cell_num, NULL, irq_base,
|
2015-07-01 09:11:32 -04:00
|
|
|
NULL);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(chip->dev, "Cannot register child devices\n");
|
2023-03-09 04:22:53 -05:00
|
|
|
if (i2c->irq)
|
|
|
|
regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
|
2015-07-01 09:11:32 -04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-08-15 04:02:30 -04:00
|
|
|
static void da9062_i2c_remove(struct i2c_client *i2c)
|
2015-07-01 09:11:32 -04:00
|
|
|
{
|
|
|
|
struct da9062 *chip = i2c_get_clientdata(i2c);
|
|
|
|
|
|
|
|
mfd_remove_devices(chip->dev);
|
|
|
|
regmap_del_irq_chip(i2c->irq, chip->regmap_irq);
|
|
|
|
}
|
|
|
|
|
2023-12-04 07:45:07 -05:00
|
|
|
static const struct of_device_id da9062_dt_ids[] = {
|
|
|
|
{ .compatible = "dlg,da9061", .data = (void *)COMPAT_TYPE_DA9061 },
|
|
|
|
{ .compatible = "dlg,da9062", .data = (void *)COMPAT_TYPE_DA9062 },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, da9062_dt_ids);
|
|
|
|
|
2015-07-01 09:11:32 -04:00
|
|
|
static const struct i2c_device_id da9062_i2c_id[] = {
|
2017-04-03 10:46:40 -04:00
|
|
|
{ "da9061", COMPAT_TYPE_DA9061 },
|
|
|
|
{ "da9062", COMPAT_TYPE_DA9062 },
|
2023-12-04 07:45:07 -05:00
|
|
|
{ }
|
2015-07-01 09:11:32 -04:00
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, da9062_i2c_id);
|
|
|
|
|
|
|
|
static struct i2c_driver da9062_i2c_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "da9062",
|
2020-11-20 11:21:20 -05:00
|
|
|
.of_match_table = da9062_dt_ids,
|
2015-07-01 09:11:32 -04:00
|
|
|
},
|
2023-05-15 14:27:52 -04:00
|
|
|
.probe = da9062_i2c_probe,
|
2015-07-01 09:11:32 -04:00
|
|
|
.remove = da9062_i2c_remove,
|
|
|
|
.id_table = da9062_i2c_id,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_i2c_driver(da9062_i2c_driver);
|
|
|
|
|
2017-04-03 10:46:40 -04:00
|
|
|
MODULE_DESCRIPTION("Core device driver for Dialog DA9061 and DA9062");
|
2015-07-01 09:11:32 -04:00
|
|
|
MODULE_AUTHOR("Steve Twiss <stwiss.opensource@diasemi.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|