2018-09-05 02:25:07 -04:00
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#include <linux/console.h>
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#include <linux/memblock.h>
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#include <linux/initrd.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/start_kernel.h>
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2020-09-11 04:56:52 -04:00
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#include <linux/dma-map-ops.h>
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2018-09-05 02:25:07 -04:00
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#include <asm/sections.h>
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#include <asm/mmu_context.h>
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#include <asm/pgalloc.h>
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static void __init csky_memblock_init(void)
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{
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2020-06-03 18:57:28 -04:00
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unsigned long lowmem_size = PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET);
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unsigned long sseg_size = PFN_DOWN(SSEG_SIZE - PHYS_OFFSET_OFFSET);
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unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };
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2018-09-05 02:25:07 -04:00
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signed long size;
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2022-07-05 02:00:15 -04:00
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memblock_reserve(__pa(_start), _end - _start);
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2018-09-05 02:25:07 -04:00
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early_init_fdt_reserve_self();
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early_init_fdt_scan_reserved_mem();
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memblock_dump_all();
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min_low_pfn = PFN_UP(memblock_start_of_DRAM());
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2020-03-28 07:14:37 -04:00
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max_low_pfn = max_pfn = PFN_DOWN(memblock_end_of_DRAM());
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2018-09-05 02:25:07 -04:00
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size = max_pfn - min_low_pfn;
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2020-06-03 18:57:28 -04:00
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if (size >= lowmem_size) {
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max_low_pfn = min_low_pfn + lowmem_size;
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2020-09-07 02:20:18 -04:00
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#ifdef CONFIG_PAGE_OFFSET_80000000
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2020-03-28 07:14:37 -04:00
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write_mmu_msa1(read_mmu_msa0() + SSEG_SIZE);
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2020-09-07 02:20:18 -04:00
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#endif
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2020-06-03 18:57:28 -04:00
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} else if (size > sseg_size) {
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max_low_pfn = min_low_pfn + sseg_size;
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2018-09-05 02:25:07 -04:00
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}
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2020-06-03 18:57:28 -04:00
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max_zone_pfn[ZONE_NORMAL] = max_low_pfn;
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2020-09-07 02:20:18 -04:00
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mmu_init(min_low_pfn, max_low_pfn);
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2018-09-05 02:25:07 -04:00
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#ifdef CONFIG_HIGHMEM
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2020-06-03 18:57:28 -04:00
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max_zone_pfn[ZONE_HIGHMEM] = max_pfn;
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2018-09-05 02:25:07 -04:00
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2020-03-28 07:14:37 -04:00
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highstart_pfn = max_low_pfn;
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highend_pfn = max_pfn;
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2018-09-05 02:25:07 -04:00
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#endif
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memblock_set_current_limit(PFN_PHYS(max_low_pfn));
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dma_contiguous_reserve(0);
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2020-06-03 18:57:28 -04:00
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free_area_init(max_zone_pfn);
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2018-09-05 02:25:07 -04:00
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}
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void __init setup_arch(char **cmdline_p)
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{
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*cmdline_p = boot_command_line;
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console_verbose();
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pr_info("Phys. mem: %ldMB\n",
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(unsigned long) memblock_phys_mem_size()/1024/1024);
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2022-07-05 02:00:15 -04:00
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setup_initial_init_mm(_start, _etext, _edata, _end);
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2018-09-05 02:25:07 -04:00
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parse_early_param();
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csky_memblock_init();
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unflatten_and_copy_device_tree();
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#ifdef CONFIG_SMP
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setup_smp();
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#endif
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sparse_init();
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2019-12-01 09:34:19 -05:00
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fixaddr_init();
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2018-09-05 02:25:07 -04:00
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#ifdef CONFIG_HIGHMEM
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kmap_init();
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#endif
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}
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2019-04-19 05:10:52 -04:00
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unsigned long va_pa_offset;
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EXPORT_SYMBOL(va_pa_offset);
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2019-04-07 23:12:25 -04:00
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2020-09-07 02:20:18 -04:00
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static inline unsigned long read_mmu_msa(void)
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{
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#ifdef CONFIG_PAGE_OFFSET_80000000
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return read_mmu_msa0();
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#endif
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#ifdef CONFIG_PAGE_OFFSET_A0000000
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return read_mmu_msa1();
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#endif
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}
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2019-04-12 07:08:34 -04:00
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asmlinkage __visible void __init csky_start(unsigned int unused,
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void *dtb_start)
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2018-09-05 02:25:07 -04:00
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{
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/* Clean up bss section */
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memset(__bss_start, 0, __bss_stop - __bss_start);
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2020-09-07 02:20:18 -04:00
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va_pa_offset = read_mmu_msa() & ~(SSEG_SIZE - 1);
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2019-04-07 23:12:25 -04:00
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2018-09-05 02:25:07 -04:00
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pre_trap_init();
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2019-04-12 07:08:34 -04:00
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if (dtb_start == NULL)
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2018-09-05 02:25:07 -04:00
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early_init_dt_scan(__dtb_start);
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else
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2019-04-12 07:08:34 -04:00
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early_init_dt_scan(dtb_start);
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2018-09-05 02:25:07 -04:00
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start_kernel();
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asm volatile("br .\n");
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}
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