kernel-aes67/arch/csky/Kconfig

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# SPDX-License-Identifier: GPL-2.0-only
config CSKY
def_bool y
select ARCH_32BIT_OFF_T
Introduce cpu_dcache_is_aliasing() across all architectures Introduce a generic way to query whether the data cache is virtually aliased on all architectures. Its purpose is to ensure that subsystems which are incompatible with virtually aliased data caches (e.g. FS_DAX) can reliably query this. For data cache aliasing, there are three scenarios dependending on the architecture. Here is a breakdown based on my understanding: A) The data cache is always aliasing: * arc * csky * m68k (note: shared memory mappings are incoherent ? SHMLBA is missing there.) * sh * parisc B) The data cache aliasing is statically known or depends on querying CPU state at runtime: * arm (cache_is_vivt() || cache_is_vipt_aliasing()) * mips (cpu_has_dc_aliases) * nios2 (NIOS2_DCACHE_SIZE > PAGE_SIZE) * sparc32 (vac_cache_size > PAGE_SIZE) * sparc64 (L1DCACHE_SIZE > PAGE_SIZE) * xtensa (DCACHE_WAY_SIZE > PAGE_SIZE) C) The data cache is never aliasing: * alpha * arm64 (aarch64) * hexagon * loongarch (but with incoherent write buffers, which are disabled since commit d23b7795 ("LoongArch: Change SHMLBA from SZ_64K to PAGE_SIZE")) * microblaze * openrisc * powerpc * riscv * s390 * um * x86 Require architectures in A) and B) to select ARCH_HAS_CPU_CACHE_ALIASING and implement "cpu_dcache_is_aliasing()". Architectures in C) don't select ARCH_HAS_CPU_CACHE_ALIASING, and thus cpu_dcache_is_aliasing() simply evaluates to "false". Note that this leaves "cpu_icache_is_aliasing()" to be implemented as future work. This would be useful to gate features like XIP on architectures which have aliasing CPU dcache-icache but not CPU dcache-dcache. Use "cpu_dcache" and "cpu_cache" rather than just "dcache" and "cache" to clarify that we really mean "CPU data cache" and "CPU cache" to eliminate any possible confusion with VFS "dentry cache" and "page cache". Link: https://lore.kernel.org/lkml/20030910210416.GA24258@mail.jlokier.co.uk/ Link: https://lkml.kernel.org/r/20240215144633.96437-9-mathieu.desnoyers@efficios.com Fixes: d92576f1167c ("dax: does not work correctly with virtual aliasing caches") Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vishal Verma <vishal.l.verma@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Matthew Wilcox <willy@infradead.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@armlinux.org.uk> Cc: Alasdair Kergon <agk@redhat.com> Cc: Christoph Hellwig <hch@lst.de> Cc: Dave Chinner <david@fromorbit.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: kernel test robot <lkp@intel.com> Cc: Michael Sclafani <dm-devel@lists.linux.dev> Cc: Mike Snitzer <snitzer@kernel.org> Cc: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2024-02-15 09:46:32 -05:00
select ARCH_HAS_CPU_CACHE_ALIASING
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_INLINE_READ_LOCK if !PREEMPTION
select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
csky: Use top-down mmap layout Follow riscv mmap layout with commit "riscv: make mmap allocation top-down by default (54c95a11cc1b)". Before: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 2aaa8000-2aac6000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 2aac6000-2aac7000 r-xp 00000000 00:00 0 [vdso] 2aac7000-2aac8000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 2aac8000-2aac9000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 2aac9000-2aad9000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 2aad9000-2aada000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 2aada000-2aadb000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 2aadb000-2aadd000 rw-p 00000000 00:00 0 2aadd000-2ac27000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 2ac27000-2ac28000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac28000-2ac2a000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac2a000-2ac2b000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 2ac2b000-2ac2e000 rw-p 00000000 00:00 0 7fb99000-7fbba000 rwxp 00000000 00:00 0 [stack] After: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 77e13000-77f5d000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 77f5d000-77f5e000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f5e000-77f60000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f60000-77f61000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 77f61000-77f66000 rw-p 00000000 00:00 0 77f66000-77f76000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 77f76000-77f77000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 77f77000-77f78000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 77f78000-77f96000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 77f96000-77f97000 r-xp 00000000 00:00 0 [vdso] 77f97000-77f98000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 77f98000-77f99000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 7fd7b000-7fd9c000 rwxp 00000000 00:00 0 [stack] Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Arnd Bergmann <arnd@arndb.de>
2020-07-30 08:44:12 -04:00
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
select COMMON_CLK
select CLKSRC_MMIO
select CSKY_MPINTC if CPU_CK860
select CSKY_MP_TIMER if CPU_CK860
select CSKY_APB_INTC
select DMA_DIRECT_REMAP
select IRQ_DOMAIN
select DW_APB_TIMER_OF
select GENERIC_IOREMAP
select GENERIC_LIB_ASHLDI3
select GENERIC_LIB_ASHRDI3
select GENERIC_LIB_LSHRDI3
select GENERIC_LIB_MULDI3
select GENERIC_LIB_CMPDI2
select GENERIC_LIB_UCMPDI2
select GENERIC_ALLOCATOR
select GENERIC_ATOMIC64
select GENERIC_CPU_DEVICES
select GENERIC_IRQ_CHIP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_IRQ_MULTI_HANDLER
select GENERIC_SCHED_CLOCK
select GENERIC_SMP_IDLE_THREAD
select GENERIC_TIME_VSYSCALL
select GENERIC_VDSO_32
select GENERIC_GETTIMEOFDAY
select GX6605S_TIMER if CPU_CK610
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
select HAVE_ARCH_JUMP_LABEL_RELATIVE
csky: Use top-down mmap layout Follow riscv mmap layout with commit "riscv: make mmap allocation top-down by default (54c95a11cc1b)". Before: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 2aaa8000-2aac6000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 2aac6000-2aac7000 r-xp 00000000 00:00 0 [vdso] 2aac7000-2aac8000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 2aac8000-2aac9000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 2aac9000-2aad9000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 2aad9000-2aada000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 2aada000-2aadb000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 2aadb000-2aadd000 rw-p 00000000 00:00 0 2aadd000-2ac27000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 2ac27000-2ac28000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac28000-2ac2a000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac2a000-2ac2b000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 2ac2b000-2ac2e000 rw-p 00000000 00:00 0 7fb99000-7fbba000 rwxp 00000000 00:00 0 [stack] After: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 77e13000-77f5d000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 77f5d000-77f5e000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f5e000-77f60000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f60000-77f61000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 77f61000-77f66000 rw-p 00000000 00:00 0 77f66000-77f76000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 77f76000-77f77000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 77f77000-77f78000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 77f78000-77f96000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 77f96000-77f97000 r-xp 00000000 00:00 0 [vdso] 77f97000-77f98000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 77f98000-77f99000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 7fd7b000-7fd9c000 rwxp 00000000 00:00 0 [stack] Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Arnd Bergmann <arnd@arndb.de>
2020-07-30 08:44:12 -04:00
select HAVE_ARCH_MMAP_RND_BITS
select HAVE_ARCH_SECCOMP_FILTER
select HAVE_CONTEXT_TRACKING_USER
csky: Add context tracking support This patch support context tracking with no hz full. Here is the test result with dynticks-testing (see tick_stop): cat /sys/kernel/debug/tracing/per_cpu/cpu0/trace tracer: nop entries-in-buffer/entries-written: 356/356 #P:1 _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | ... sleep-192 [000] d.h. 167.088270: hrtimer_expire_entry: hrtimer=(ptrval) function=tick_sched_timer now=166436355700 sleep-192 [000] d.h. 167.092279: hrtimer_expire_entry: hrtimer=(ptrval) function=tick_sched_timer now=166440365700 <idle>-0 [000] d.h2 167.096492: hrtimer_expire_entry: hrtimer=(ptrval) function=tick_sched_timer now=166444578400 <idle>-0 [000] d..1 167.097876: tick_stop: success=1 dependency=NONE ^^^^^^^^^ <idle>-0 [000] d.h1 168.818206: hrtimer_expire_entry: hrtimer=(ptrval) function=tick_sched_timer now=168166280900 kworker/u2:0-7 [000] .... 168.821760: workqueue_execute_start: work struct (ptrval): function wb_workfn kworker/u2:0-7 [000] d.h1 168.824464: hrtimer_expire_entry: hrtimer=(ptrval) function=tick_sched_timer now=168172547100 kworker/0:1-18 [000] .... 168.825053: workqueue_execute_start: work struct (ptrval): function vmstat_update kworker/0:1-18 [000] .... 168.825238: workqueue_execute_start: work struct (ptrval): function vmstat_shepherd kworker/0:1-18 [000] .... 168.825516: workqueue_execute_start: work struct (ptrval): function neigh_periodic_work <idle>-0 [000] d..1 168.826121: tick_stop: success=1 dependency=NONE kworker/u2:0-7 [000] .... 169.377327: workqueue_execute_start: work struct (ptrval): function flush_to_ldisc <idle>-0 [000] d..1 169.379832: tick_stop: success=1 dependency=NONE kworker/u2:0-7 [000] .... 169.607935: workqueue_execute_start: work struct (ptrval): function flush_to_ldisc kworker/u2:0-7 [000] d.h1 169.608148: hrtimer_expire_entry: hrtimer=(ptrval) function=tick_sched_timer now=168956235500 <idle>-0 [000] d..1 169.608654: tick_stop: success=1 dependency=NONE Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Greentime Hu <greentime.hu@sifive.com> Cc: Arnd Bergmann <arnd@arndb.de>
2020-07-31 05:13:51 -04:00
select HAVE_VIRT_CPU_ACCOUNTING_GEN
select HAVE_DEBUG_BUGVERBOSE
select HAVE_DEBUG_KMEMLEAK
select HAVE_DYNAMIC_FTRACE
select HAVE_DYNAMIC_FTRACE_WITH_REGS
select HAVE_GENERIC_VDSO
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_ERROR_INJECTION
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZO
select HAVE_KERNEL_LZMA
select HAVE_KPROBES if !CPU_CK610
select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
select HAVE_KRETPROBES if !CPU_CK610
select HAVE_PAGE_SIZE_4KB
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
select HAVE_DMA_CONTIGUOUS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_STACKPROTECTOR
select HAVE_SYSCALL_TRACEPOINTS
select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
select LOCK_MM_AND_FIND_VMA
select MAY_HAVE_SPARSE_IRQ
select MODULES_USE_ELF_RELA if MODULES
select OF
select OF_EARLY_FLATTREE
select PERF_USE_VMALLOC if CPU_CK610
select RTC_LIB
select TIMER_OF
select GENERIC_PCI_IOMAP
select HAVE_PCI
select PCI_DOMAINS_GENERIC if PCI
select PCI_SYSCALL if PCI
select PCI_MSI if PCI
select TRACE_IRQFLAGS_SUPPORT
config LOCKDEP_SUPPORT
def_bool y
config ARCH_SUPPORTS_UPROBES
def_bool y if !CPU_CK610
config CPU_HAS_CACHEV2
bool
config CPU_HAS_FPUV2
bool
config CPU_HAS_HILO
bool
config CPU_HAS_TLBI
bool
config CPU_HAS_LDSTEX
bool
help
For SMP, CPU needs "ldex&stex" instructions for atomic operations.
config CPU_NEED_TLBSYNC
bool
config CPU_NEED_SOFTALIGN
bool
config CPU_NO_USER_BKPT
bool
help
For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
So we need a 16bit instruction as user space bkpt, and it will cause an illegal
instruction exception.
In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
config GENERIC_CALIBRATE_DELAY
def_bool y
config GENERIC_CSUM
def_bool y
config GENERIC_HWEIGHT
def_bool y
config MMU
def_bool y
config STACKTRACE_SUPPORT
def_bool y
config TIME_LOW_RES
def_bool y
config CPU_ASID_BITS
int
default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
default "12" if (CPU_CK860)
config L1_CACHE_SHIFT
int
default "4" if (CPU_CK610)
default "5" if (CPU_CK807 || CPU_CK810)
default "6" if (CPU_CK860)
csky: Use top-down mmap layout Follow riscv mmap layout with commit "riscv: make mmap allocation top-down by default (54c95a11cc1b)". Before: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 2aaa8000-2aac6000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 2aac6000-2aac7000 r-xp 00000000 00:00 0 [vdso] 2aac7000-2aac8000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 2aac8000-2aac9000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 2aac9000-2aad9000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 2aad9000-2aada000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 2aada000-2aadb000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 2aadb000-2aadd000 rw-p 00000000 00:00 0 2aadd000-2ac27000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 2ac27000-2ac28000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac28000-2ac2a000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 2ac2a000-2ac2b000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 2ac2b000-2ac2e000 rw-p 00000000 00:00 0 7fb99000-7fbba000 rwxp 00000000 00:00 0 [stack] After: cat /proc/self/maps 00008000-000dc000 r-xp 00000000 fe:00 17 /bin/busybox 000dc000-000dd000 r--p 000d3000 fe:00 17 /bin/busybox 000dd000-000de000 rw-p 000d4000 fe:00 17 /bin/busybox 77e13000-77f5d000 r-xp 00000000 fe:00 203 /lib/libc-2.28.9000.so 77f5d000-77f5e000 ---p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f5e000-77f60000 r--p 0014a000 fe:00 203 /lib/libc-2.28.9000.so 77f60000-77f61000 rw-p 0014c000 fe:00 203 /lib/libc-2.28.9000.so 77f61000-77f66000 rw-p 00000000 00:00 0 77f66000-77f76000 r-xp 00000000 fe:00 219 /lib/libresolv-2.28.9000.so 77f76000-77f77000 r--p 0000f000 fe:00 219 /lib/libresolv-2.28.9000.so 77f77000-77f78000 rw-p 00010000 fe:00 219 /lib/libresolv-2.28.9000.so 77f78000-77f96000 r-xp 00000000 fe:00 196 /lib/ld-2.28.9000.so 77f96000-77f97000 r-xp 00000000 00:00 0 [vdso] 77f97000-77f98000 r--p 0001e000 fe:00 196 /lib/ld-2.28.9000.so 77f98000-77f99000 rw-p 0001f000 fe:00 196 /lib/ld-2.28.9000.so 7fd7b000-7fd9c000 rwxp 00000000 00:00 0 [stack] Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Arnd Bergmann <arnd@arndb.de>
2020-07-30 08:44:12 -04:00
config ARCH_MMAP_RND_BITS_MIN
default 8
# max bits determined by the following formula:
# VA_BITS - PAGE_SHIFT - 3
config ARCH_MMAP_RND_BITS_MAX
default 17
menu "Processor type and features"
choice
prompt "CPU MODEL"
default CPU_CK807
config CPU_CK610
bool "CSKY CPU ck610"
select CPU_NEED_TLBSYNC
select CPU_NEED_SOFTALIGN
select CPU_NO_USER_BKPT
config CPU_CK810
bool "CSKY CPU ck810"
select CPU_HAS_HILO
select CPU_NEED_TLBSYNC
config CPU_CK807
bool "CSKY CPU ck807"
select CPU_HAS_HILO
config CPU_CK860
bool "CSKY CPU ck860"
select CPU_HAS_TLBI
select CPU_HAS_CACHEV2
select CPU_HAS_LDSTEX
select CPU_HAS_FPUV2
endchoice
choice
prompt "PAGE OFFSET"
default PAGE_OFFSET_80000000
config PAGE_OFFSET_80000000
bool "PAGE OFFSET 2G (user:kernel = 2:2)"
config PAGE_OFFSET_A0000000
bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
endchoice
config PAGE_OFFSET
hex
default 0x80000000 if PAGE_OFFSET_80000000
default 0xa0000000 if PAGE_OFFSET_A0000000
choice
prompt "C-SKY PMU type"
depends on PERF_EVENTS
depends on CPU_CK807 || CPU_CK810 || CPU_CK860
config CPU_PMU_NONE
bool "None"
config CSKY_PMU_V1
bool "Performance Monitoring Unit Ver.1"
endchoice
choice
prompt "Power Manager Instruction (wait/doze/stop)"
default CPU_PM_NONE
config CPU_PM_NONE
bool "None"
config CPU_PM_WAIT
bool "wait"
config CPU_PM_DOZE
bool "doze"
config CPU_PM_STOP
bool "stop"
endchoice
csky: Tightly-Coupled Memory or Sram support The implementation are not only used by TCM but also used by sram on SOC bus. It follow existed linux tcm software interface, so that old tcm application codes could be re-used directly. Software interface list in asm/tcm.h: - Variables/Const: __tcmdata, __tcmconst - Functions: __tcmfunc, __tcmlocalfunc - Malloc/Free: tcm_alloc, tcm_free In linux menuconfig: - Choose a TCM contain instrctions + data or separated in ITCM/DTCM. - Determine TCM_BASE (DTCM_BASE) in phyiscal address. - Determine size of TCM or ITCM(DTCM) in page counts. Here is hello tcm example from Documentation/arm/tcm.rst which could be directly used: /* Uninitialized data */ static u32 __tcmdata tcmvar; /* Initialized data */ static u32 __tcmdata tcmassigned = 0x2BADBABEU; /* Constant */ static const u32 __tcmconst tcmconst = 0xCAFEBABEU; static void __tcmlocalfunc tcm_to_tcm(void) { int i; for (i = 0; i < 100; i++) tcmvar ++; } static void __tcmfunc hello_tcm(void) { /* Some abstract code that runs in ITCM */ int i; for (i = 0; i < 100; i++) { tcmvar ++; } tcm_to_tcm(); } static void __init test_tcm(void) { u32 *tcmem; int i; hello_tcm(); printk("Hello TCM executed from ITCM RAM\n"); printk("TCM variable from testrun: %u @ %p\n", tcmvar, &tcmvar); tcmvar = 0xDEADBEEFU; printk("TCM variable: 0x%x @ %p\n", tcmvar, &tcmvar); printk("TCM assigned variable: 0x%x @ %p\n", tcmassigned, &tcmassigned); printk("TCM constant: 0x%x @ %p\n", tcmconst, &tcmconst); /* Allocate some TCM memory from the pool */ tcmem = tcm_alloc(20); if (tcmem) { printk("TCM Allocated 20 bytes of TCM @ %p\n", tcmem); tcmem[0] = 0xDEADBEEFU; tcmem[1] = 0x2BADBABEU; tcmem[2] = 0xCAFEBABEU; tcmem[3] = 0xDEADBEEFU; tcmem[4] = 0x2BADBABEU; for (i = 0; i < 5; i++) printk("TCM tcmem[%d] = %08x\n", i, tcmem[i]); tcm_free(tcmem, 20); } } TODO: - Separate fixup mapping from highmem - Support abiv1 Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
2019-11-26 19:44:33 -05:00
menuconfig HAVE_TCM
bool "Tightly-Coupled/Sram Memory"
depends on !COMPILE_TEST
csky: Tightly-Coupled Memory or Sram support The implementation are not only used by TCM but also used by sram on SOC bus. It follow existed linux tcm software interface, so that old tcm application codes could be re-used directly. Software interface list in asm/tcm.h: - Variables/Const: __tcmdata, __tcmconst - Functions: __tcmfunc, __tcmlocalfunc - Malloc/Free: tcm_alloc, tcm_free In linux menuconfig: - Choose a TCM contain instrctions + data or separated in ITCM/DTCM. - Determine TCM_BASE (DTCM_BASE) in phyiscal address. - Determine size of TCM or ITCM(DTCM) in page counts. Here is hello tcm example from Documentation/arm/tcm.rst which could be directly used: /* Uninitialized data */ static u32 __tcmdata tcmvar; /* Initialized data */ static u32 __tcmdata tcmassigned = 0x2BADBABEU; /* Constant */ static const u32 __tcmconst tcmconst = 0xCAFEBABEU; static void __tcmlocalfunc tcm_to_tcm(void) { int i; for (i = 0; i < 100; i++) tcmvar ++; } static void __tcmfunc hello_tcm(void) { /* Some abstract code that runs in ITCM */ int i; for (i = 0; i < 100; i++) { tcmvar ++; } tcm_to_tcm(); } static void __init test_tcm(void) { u32 *tcmem; int i; hello_tcm(); printk("Hello TCM executed from ITCM RAM\n"); printk("TCM variable from testrun: %u @ %p\n", tcmvar, &tcmvar); tcmvar = 0xDEADBEEFU; printk("TCM variable: 0x%x @ %p\n", tcmvar, &tcmvar); printk("TCM assigned variable: 0x%x @ %p\n", tcmassigned, &tcmassigned); printk("TCM constant: 0x%x @ %p\n", tcmconst, &tcmconst); /* Allocate some TCM memory from the pool */ tcmem = tcm_alloc(20); if (tcmem) { printk("TCM Allocated 20 bytes of TCM @ %p\n", tcmem); tcmem[0] = 0xDEADBEEFU; tcmem[1] = 0x2BADBABEU; tcmem[2] = 0xCAFEBABEU; tcmem[3] = 0xDEADBEEFU; tcmem[4] = 0x2BADBABEU; for (i = 0; i < 5; i++) printk("TCM tcmem[%d] = %08x\n", i, tcmem[i]); tcm_free(tcmem, 20); } } TODO: - Separate fixup mapping from highmem - Support abiv1 Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
2019-11-26 19:44:33 -05:00
help
The implementation are not only used by TCM (Tightly-Coupled Memory)
csky: Tightly-Coupled Memory or Sram support The implementation are not only used by TCM but also used by sram on SOC bus. It follow existed linux tcm software interface, so that old tcm application codes could be re-used directly. Software interface list in asm/tcm.h: - Variables/Const: __tcmdata, __tcmconst - Functions: __tcmfunc, __tcmlocalfunc - Malloc/Free: tcm_alloc, tcm_free In linux menuconfig: - Choose a TCM contain instrctions + data or separated in ITCM/DTCM. - Determine TCM_BASE (DTCM_BASE) in phyiscal address. - Determine size of TCM or ITCM(DTCM) in page counts. Here is hello tcm example from Documentation/arm/tcm.rst which could be directly used: /* Uninitialized data */ static u32 __tcmdata tcmvar; /* Initialized data */ static u32 __tcmdata tcmassigned = 0x2BADBABEU; /* Constant */ static const u32 __tcmconst tcmconst = 0xCAFEBABEU; static void __tcmlocalfunc tcm_to_tcm(void) { int i; for (i = 0; i < 100; i++) tcmvar ++; } static void __tcmfunc hello_tcm(void) { /* Some abstract code that runs in ITCM */ int i; for (i = 0; i < 100; i++) { tcmvar ++; } tcm_to_tcm(); } static void __init test_tcm(void) { u32 *tcmem; int i; hello_tcm(); printk("Hello TCM executed from ITCM RAM\n"); printk("TCM variable from testrun: %u @ %p\n", tcmvar, &tcmvar); tcmvar = 0xDEADBEEFU; printk("TCM variable: 0x%x @ %p\n", tcmvar, &tcmvar); printk("TCM assigned variable: 0x%x @ %p\n", tcmassigned, &tcmassigned); printk("TCM constant: 0x%x @ %p\n", tcmconst, &tcmconst); /* Allocate some TCM memory from the pool */ tcmem = tcm_alloc(20); if (tcmem) { printk("TCM Allocated 20 bytes of TCM @ %p\n", tcmem); tcmem[0] = 0xDEADBEEFU; tcmem[1] = 0x2BADBABEU; tcmem[2] = 0xCAFEBABEU; tcmem[3] = 0xDEADBEEFU; tcmem[4] = 0x2BADBABEU; for (i = 0; i < 5; i++) printk("TCM tcmem[%d] = %08x\n", i, tcmem[i]); tcm_free(tcmem, 20); } } TODO: - Separate fixup mapping from highmem - Support abiv1 Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
2019-11-26 19:44:33 -05:00
but also used by sram on SOC bus. It follow existed linux tcm
software interface, so that old tcm application codes could be
re-used directly.
if HAVE_TCM
config ITCM_RAM_BASE
hex "ITCM ram base"
default 0xffffffff
config ITCM_NR_PAGES
int "Page count of ITCM size: NR*4KB"
range 1 256
default 32
config HAVE_DTCM
bool "DTCM Support"
config DTCM_RAM_BASE
hex "DTCM ram base"
depends on HAVE_DTCM
default 0xffffffff
config DTCM_NR_PAGES
int "Page count of DTCM size: NR*4KB"
depends on HAVE_DTCM
range 1 256
default 32
endif
config CPU_HAS_VDSP
bool "CPU has VDSP coprocessor"
depends on CPU_HAS_FPU && CPU_HAS_FPUV2
config CPU_HAS_FPU
bool "CPU has FPU coprocessor"
depends on CPU_CK807 || CPU_CK810 || CPU_CK860
config CPU_HAS_ICACHE_INS
bool "CPU has Icache invalidate instructions"
depends on CPU_HAS_CACHEV2
config CPU_HAS_TEE
bool "CPU has Trusted Execution Environment"
depends on CPU_CK810
config SMP
bool "Symmetric Multi-Processing (SMP) support for C-SKY"
depends on CPU_CK860
default n
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
default "4"
config HIGHMEM
bool "High Memory Support"
depends on !CPU_CK610
select KMAP_LOCAL
default y
config DRAM_BASE
hex "DRAM start addr (the same with memory-section in dts)"
default 0x0
config HOTPLUG_CPU
bool "Support for hot-pluggable CPUs"
select GENERIC_IRQ_MIGRATION
depends on SMP
help
Say Y here to allow turning CPUs off and on. CPUs can be
controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
Say N if you want to disable CPU hotplug.
config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
depends on CPU_CK807 || CPU_CK810 || CPU_CK860
help
Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
deal with unaligned access by hardware.
endmenu
source "arch/csky/Kconfig.platforms"
source "kernel/Kconfig.hz"